| /linux-6.3-rc2/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| A D | tonga_smumgr.c | 530 smu_data->smc_state_table.LinkLevelCount = in tonga_populate_smc_link_level()
730 smu_data->smc_state_table.GraphicsDpmLevelCount = in tonga_populate_all_graphic_levels()
1102 smu_data->smc_state_table.MemoryLevel; in tonga_populate_all_memory_levels()
1114 &(smu_data->smc_state_table.MemoryLevel[i])); in tonga_populate_all_memory_levels()
1550 smu_data->smc_state_table.MemoryBootLevel = 0; in tonga_populate_smc_boot_level()
2234 memset(&(smu_data->smc_state_table), 0x00, sizeof(smu_data->smc_state_table)); in tonga_init_smc_table()
2683 smu_data->smc_state_table.UvdBootLevel = 0; in tonga_update_uvd_smc_table()
2685 smu_data->smc_state_table.UvdBootLevel = in tonga_update_uvd_smc_table()
2719 smu_data->smc_state_table.VceBootLevel = in tonga_update_vce_smc_table()
3155 smu_data->smc_state_table.GraphicsLevel; in tonga_update_dpm_settings()
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| A D | fiji_smumgr.c | 847 smu_data->smc_state_table.LinkLevelCount = in fiji_populate_smc_link_level()
1015 smu_data->smc_state_table.GraphicsLevel; in fiji_populate_all_graphic_levels()
1041 smu_data->smc_state_table.GraphicsDpmLevelCount = in fiji_populate_all_graphic_levels()
1231 smu_data->smc_state_table.MemoryLevel; in fiji_populate_all_memory_levels()
1256 smu_data->smc_state_table.MemoryDpmLevelCount = in fiji_populate_all_memory_levels()
2372 smu_data->smc_state_table.UvdBootLevel = 0; in fiji_update_uvd_smc_table()
2374 smu_data->smc_state_table.UvdBootLevel = in fiji_update_uvd_smc_table()
2407 smu_data->smc_state_table.VceBootLevel = in fiji_update_vce_smc_table()
2410 smu_data->smc_state_table.VceBootLevel = 0; in fiji_update_vce_smc_table()
2556 smu_data->smc_state_table.GraphicsLevel; in fiji_update_dpm_settings()
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| A D | polaris10_smumgr.c | 836 smu_data->smc_state_table.LinkLevelCount = in polaris10_populate_smc_link_level()
1051 smu_data->smc_state_table.GraphicsLevel; in polaris10_populate_all_graphic_levels()
1097 smu_data->smc_state_table.GraphicsDpmLevelCount = in polaris10_populate_all_graphic_levels()
1220 smu_data->smc_state_table.MemoryLevel; in polaris10_populate_all_memory_levels()
1236 smu_data->smc_state_table.MemoryDpmLevelCount = in polaris10_populate_all_memory_levels()
2288 smu_data->smc_state_table.UvdBootLevel = 0; in polaris10_update_uvd_smc_table()
2290 smu_data->smc_state_table.UvdBootLevel = in polaris10_update_uvd_smc_table()
2323 smu_data->smc_state_table.VceBootLevel = in polaris10_update_vce_smc_table()
2326 smu_data->smc_state_table.VceBootLevel = 0; in polaris10_update_vce_smc_table()
2594 smu_data->smc_state_table.GraphicsLevel; in polaris10_update_dpm_settings()
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| A D | ci_smumgr.c | 483 smu_data->smc_state_table.GraphicsLevel; in ci_populate_all_graphic_levels()
1015 smu_data->smc_state_table.LinkLevelCount = in ci_populate_smc_link_level()
1320 &(smu_data->smc_state_table.MemoryLevel[i])); in ci_populate_all_memory_levels()
1331 smu_data->smc_state_table.MemoryLevel[1].MinVddci = in ci_populate_all_memory_levels()
1333 smu_data->smc_state_table.MemoryLevel[1].MinMvdd = in ci_populate_all_memory_levels()
1701 smu_data->smc_state_table.GraphicsBootLevel = 0; in ci_populate_smc_boot_level()
1711 smu_data->smc_state_table.MemoryBootLevel = 0; in ci_populate_smc_boot_level()
1952 memset(&(smu_data->smc_state_table), 0x00, sizeof(smu_data->smc_state_table)); in ci_init_smc_table()
2767 smu_data->smc_state_table.GraphicsLevel; in ci_update_dpm_settings()
2774 smu_data->smc_state_table.MemoryLevel; in ci_update_dpm_settings()
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| A D | vegam_smumgr.c | 338 smu_data->smc_state_table.UvdBootLevel = 0; in vegam_update_uvd_smc_table()
340 smu_data->smc_state_table.UvdBootLevel = in vegam_update_uvd_smc_table()
373 smu_data->smc_state_table.VceBootLevel = in vegam_update_vce_smc_table()
376 smu_data->smc_state_table.VceBootLevel = 0; in vegam_update_vce_smc_table()
591 smu_data->smc_state_table.LinkLevelCount = in vegam_populate_smc_link_level()
880 smu_data->smc_state_table.GraphicsLevel; in vegam_populate_all_graphic_levels()
893 &(smu_data->smc_state_table.GraphicsLevel[i])); in vegam_populate_all_graphic_levels()
909 smu_data->smc_state_table.GraphicsDpmLevelCount = in vegam_populate_all_graphic_levels()
1047 smu_data->smc_state_table.MemoryLevel; in vegam_populate_all_memory_levels()
1067 smu_data->smc_state_table.MemoryDpmLevelCount = in vegam_populate_all_memory_levels()
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| A D | iceland_smumgr.c | 787 smu_data->smc_state_table.LinkLevelCount = in iceland_populate_smc_link_level()
983 &(smu_data->smc_state_table.GraphicsLevel[i])); in iceland_populate_all_graphic_levels()
1000 smu_data->smc_state_table.GraphicsDpmLevelCount = in iceland_populate_all_graphic_levels()
1365 &(smu_data->smc_state_table.MemoryLevel[i])); in iceland_populate_all_memory_levels()
1379 smu_data->smc_state_table.MemoryLevel[0].ActivityLevel = 0x1F; in iceland_populate_all_memory_levels()
1662 smu_data->smc_state_table.GraphicsBootLevel = 0; in iceland_populate_smc_boot_level()
1669 (uint32_t *)&(smu_data->smc_state_table.MemoryBootLevel)); in iceland_populate_smc_boot_level()
1672 smu_data->smc_state_table.MemoryBootLevel = 0; in iceland_populate_smc_boot_level()
1831 smu_data->smc_state_table.GraphicsBootLevel = level; in iceland_populate_smc_initial_state()
1841 smu_data->smc_state_table.MemoryBootLevel = level; in iceland_populate_smc_initial_state()
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| A D | fiji_smumgr.h | 42 struct SMU73_Discrete_DpmTable smc_state_table; member
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| A D | polaris10_smumgr.h | 57 SMU74_Discrete_DpmTable smc_state_table; member
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| A D | iceland_smumgr.h | 62 struct SMU71_Discrete_DpmTable smc_state_table; member
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| A D | vegam_smumgr.h | 66 SMU75_Discrete_DpmTable smc_state_table; member
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| A D | ci_smumgr.h | 68 struct SMU7_Discrete_DpmTable smc_state_table; member
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| A D | tonga_smumgr.h | 66 struct SMU72_Discrete_DpmTable smc_state_table; member
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| /linux-6.3-rc2/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| A D | vega10_hwmgr.c | 3740 data->smc_state_table.gfx_max_level = in vega10_generate_dpm_level_enable_mask()
3744 data->smc_state_table.mem_max_level = in vega10_generate_dpm_level_enable_mask()
3748 data->smc_state_table.soc_max_level = in vega10_generate_dpm_level_enable_mask()
3757 for(i = data->smc_state_table.gfx_boot_level; i < data->smc_state_table.gfx_max_level; i++) in vega10_generate_dpm_level_enable_mask()
3761 for(i = data->smc_state_table.mem_boot_level; i < data->smc_state_table.mem_max_level; i++) in vega10_generate_dpm_level_enable_mask()
3764 for (i = data->smc_state_table.soc_boot_level; i < data->smc_state_table.soc_max_level; i++) in vega10_generate_dpm_level_enable_mask()
4122 data->smc_state_table.gfx_max_level = in vega10_force_dpm_highest()
4125 data->smc_state_table.mem_max_level = in vega10_force_dpm_highest()
4144 data->smc_state_table.gfx_max_level = in vega10_force_dpm_lowest()
4147 data->smc_state_table.mem_max_level = in vega10_force_dpm_lowest()
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| A D | vega10_thermal.c | 510 PPTable_t *table = &(data->smc_state_table.pp_table); in vega10_thermal_setup_fan_table()
555 (uint8_t *)(&(data->smc_state_table.pp_table)), in vega10_thermal_setup_fan_table()
566 PPTable_t *table = &(data->smc_state_table.pp_table); in vega10_enable_mgpu_fan_boost()
580 (uint8_t *)(&(data->smc_state_table.pp_table)), in vega10_enable_mgpu_fan_boost()
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| A D | vega12_thermal.c | 254 PPTable_t *table = &(data->smc_state_table.pp_table); in vega12_thermal_setup_fan_table()
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| A D | vega20_thermal.c | 325 PPTable_t *table = &(data->smc_state_table.pp_table); in vega20_thermal_setup_fan_table()
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| A D | vega20_hwmgr.c | 784 PPTable_t *pp_table = &(data->smc_state_table.pp_table); in vega20_init_smc_table()
835 PPTable_t *pp_table = &(data->smc_state_table.pp_table); in vega20_override_pcie_parameters()
1042 PPTable_t *pp_table = &(data->smc_state_table.pp_table); in vega20_od8_set_feature_capabilities()
1243 OverDriveTable_t *od_table = &(data->smc_state_table.overdrive_table); in vega20_od8_initialize_default_settings()
1344 od_table->FanMinimumPwm * data->smc_state_table.pp_table.FanMaximumRpm / 100; in vega20_od8_initialize_default_settings()
2933 Watermarks_t *table = &(data->smc_state_table.water_marks_table); in vega20_set_watermarks_for_clocks_ranges()
2956 &(data->smc_state_table.overdrive_table); in vega20_odn_edit_dpm_table()
3354 &(data->smc_state_table.overdrive_table); in vega20_print_clock_levels()
3355 PPTable_t *pptable = &(data->smc_state_table.pp_table); in vega20_print_clock_levels()
3637 Watermarks_t *wm_table = &(data->smc_state_table.water_marks_table); in vega20_display_configuration_changed_task()
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| A D | vega10_hwmgr.h | 381 struct vega10_smc_state_table smc_state_table; member
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| A D | vega12_hwmgr.h | 393 struct vega12_smc_state_table smc_state_table; member
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| A D | vega20_hwmgr.h | 522 struct vega20_smc_state_table smc_state_table; member
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| A D | vega12_hwmgr.c | 490 PPTable_t *pp_table = &(data->smc_state_table.pp_table); in vega12_override_pcie_parameters()
815 PPTable_t *pp_table = &(data->smc_state_table.pp_table); in vega12_init_smc_table()
2001 Watermarks_t *table = &(data->smc_state_table.water_marks_table); in vega12_set_watermarks_for_clocks_ranges()
2553 Watermarks_t *wm_table = &(data->smc_state_table.water_marks_table); in vega12_display_configuration_changed_task()
2768 PPTable_t *pp_table = &(data->smc_state_table.pp_table); in vega12_get_thermal_temperature_range()
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| A D | vega10_powertune.c | 1269 PPTable_t *table = &(data->smc_state_table.pp_table); in vega10_initialize_power_tune_defaults()
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| A D | smu7_hwmgr.c | 5323 SMU74_Discrete_DpmTable *table = &(smu_data->smc_state_table); in smu7_set_watermarks_for_clocks_ranges()
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| /linux-6.3-rc2/drivers/gpu/drm/radeon/ |
| A D | ci_dpm.c | 2557 pi->smc_state_table.GraphicsBootLevel = level; in ci_populate_smc_initial_state()
2565 pi->smc_state_table.MemoryBootLevel = level; in ci_populate_smc_initial_state()
3254 &pi->smc_state_table.GraphicsLevel[i]); in ci_populate_all_graphic_levels()
3302 &pi->smc_state_table.MemoryLevel[i]); in ci_populate_all_memory_levels()
3311 pi->smc_state_table.MemoryLevel[1].MinVddc = in ci_populate_all_memory_levels()
3312 pi->smc_state_table.MemoryLevel[0].MinVddc; in ci_populate_all_memory_levels()
3596 (u32 *)&pi->smc_state_table.MemoryBootLevel); in ci_init_smc_table()
4046 pi->smc_state_table.UvdBootLevel = 0; in ci_update_uvd_dpm()
4048 pi->smc_state_table.UvdBootLevel = in ci_update_uvd_dpm()
4117 pi->smc_state_table.AcpBootLevel = 0;
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| A D | ci_dpm.h | 224 SMU7_Discrete_DpmTable smc_state_table; member
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