/linux-6.3-rc2/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
A D | aldebaran_ppt.c | 316 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) { in aldebaran_set_default_dpm_table() 332 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT)) { in aldebaran_set_default_dpm_table() 351 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in aldebaran_set_default_dpm_table() 367 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_FCLK_BIT)) { in aldebaran_set_default_dpm_table() 698 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT)) in aldebaran_get_current_clk_freq_by_table() 704 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) in aldebaran_get_current_clk_freq_by_table() 716 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) in aldebaran_get_current_clk_freq_by_table() 722 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) in aldebaran_get_current_clk_freq_by_table() 957 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT) && in aldebaran_upload_dpm_level() 1204 if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_PPT_BIT)) { in aldebaran_get_power_limit() [all …]
|
A D | smu_v13_0.c | 861 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT) && in smu_v13_0_notify_display_change() 919 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in smu_v13_0_init_max_sustainable_clocks() 930 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) { in smu_v13_0_init_max_sustainable_clocks() 941 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) { in smu_v13_0_init_max_sustainable_clocks() 989 if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_PPT_BIT)) in smu_v13_0_get_current_power_limit() 1019 if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_PPT_BIT)) { in smu_v13_0_set_power_limit() 1047 smu_cmn_feature_is_enabled(smu, SMU_FEATURE_ACDC_BIT)) in smu_v13_0_process_pending_interrupt() 1109 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT) || in smu_v13_0_display_clock_voltage_request() 1110 smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in smu_v13_0_display_clock_voltage_request() 1151 if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_FAN_CONTROL_BIT)) in smu_v13_0_get_fan_control_mode() [all …]
|
A D | smu_v13_0_7_ppt.c | 556 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) { in smu_v13_0_7_set_default_dpm_table() 572 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT)) { in smu_v13_0_7_set_default_dpm_table() 588 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in smu_v13_0_7_set_default_dpm_table() 604 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_FCLK_BIT)) { in smu_v13_0_7_set_default_dpm_table() 620 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_VCLK_BIT)) { in smu_v13_0_7_set_default_dpm_table() 636 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCLK_BIT)) { in smu_v13_0_7_set_default_dpm_table() 1682 .feature_is_enabled = smu_cmn_feature_is_enabled,
|
A D | smu_v13_0_0_ppt.c | 548 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) { in smu_v13_0_0_set_default_dpm_table() 564 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT)) { in smu_v13_0_0_set_default_dpm_table() 597 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in smu_v13_0_0_set_default_dpm_table() 613 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_FCLK_BIT)) { in smu_v13_0_0_set_default_dpm_table() 629 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_VCLK_BIT)) { in smu_v13_0_0_set_default_dpm_table() 645 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCLK_BIT)) { in smu_v13_0_0_set_default_dpm_table() 2140 .feature_is_enabled = smu_cmn_feature_is_enabled,
|
A D | smu_v13_0_4_ppt.c | 715 return smu_cmn_feature_is_enabled(smu, feature_id); in smu_v13_0_4_clk_dpm_is_enabled()
|
A D | smu_v13_0_5_ppt.c | 715 return smu_cmn_feature_is_enabled(smu, feature_id); in smu_v13_0_5_clk_dpm_is_enabled()
|
A D | yellow_carp_ppt.c | 841 return smu_cmn_feature_is_enabled(smu, feature_id); in yellow_carp_clk_dpm_is_enabled()
|
/linux-6.3-rc2/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
A D | navi10_ppt.c | 1013 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in navi10_set_default_dpm_table() 1031 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) { in navi10_set_default_dpm_table() 1049 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) { in navi10_set_default_dpm_table() 1146 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) { in navi10_dpm_set_vcn_enable() 1152 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) { in navi10_dpm_set_vcn_enable() 1167 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_JPEG_PG_BIT)) { in navi10_dpm_set_jpeg_enable() 1173 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_JPEG_PG_BIT)) { in navi10_dpm_set_jpeg_enable() 1834 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in navi10_pre_display_config_changed() 2751 if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) in navi10_need_umc_cdr_workaround() 2767 if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) in navi10_umc_hybrid_cdr_workaround() [all …]
|
A D | arcturus_ppt.c | 336 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) { in arcturus_set_default_dpm_table() 354 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT)) { in arcturus_set_default_dpm_table() 372 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in arcturus_set_default_dpm_table() 390 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_FCLK_BIT)) { in arcturus_set_default_dpm_table() 719 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT)) in arcturus_get_current_clk_freq_by_table() 725 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) in arcturus_get_current_clk_freq_by_table() 731 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) in arcturus_get_current_clk_freq_by_table() 737 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_DPM_BIT)) in arcturus_get_current_clk_freq_by_table() 743 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_DPM_BIT)) in arcturus_get_current_clk_freq_by_table() 971 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT) && in arcturus_upload_dpm_level() [all …]
|
A D | smu_v11_0.c | 785 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT) && in smu_v11_0_notify_display_change() 843 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in smu_v11_0_init_max_sustainable_clocks() 854 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) { in smu_v11_0_init_max_sustainable_clocks() 865 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) { in smu_v11_0_init_max_sustainable_clocks() 913 if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_PPT_BIT)) in smu_v11_0_get_current_power_limit() 949 if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_PPT_BIT)) { in smu_v11_0_set_power_limit() 993 smu_cmn_feature_is_enabled(smu, SMU_FEATURE_ACDC_BIT)) in smu_v11_0_process_pending_interrupt() 1061 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT) || in smu_v11_0_display_clock_voltage_request() 1062 smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in smu_v11_0_display_clock_voltage_request() 1132 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_FAN_CONTROL_BIT)) in smu_v11_0_get_fan_control_mode() [all …]
|
A D | sienna_cichlid_ppt.c | 935 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) { in sienna_cichlid_set_default_dpm_table() 953 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT)) { in sienna_cichlid_set_default_dpm_table() 971 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in sienna_cichlid_set_default_dpm_table() 989 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_FCLK_BIT)) { in sienna_cichlid_set_default_dpm_table() 1011 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_MM_DPM_PG_BIT)) { in sienna_cichlid_set_default_dpm_table() 1033 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_MM_DPM_PG_BIT)) { in sienna_cichlid_set_default_dpm_table() 1134 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_MM_DPM_PG_BIT)) { in sienna_cichlid_dpm_set_vcn_enable() 1151 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_MM_DPM_PG_BIT)) { in sienna_cichlid_dpm_set_jpeg_enable() 1524 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in sienna_cichlid_pre_display_config_changed() 1799 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in sienna_cichlid_notify_smc_display_config() [all …]
|
A D | vangogh_ppt.c | 906 if (!smu_cmn_feature_is_enabled(smu, feature_id)) in vangogh_clk_dpm_is_enabled() 1341 if (!smu_cmn_feature_is_enabled(smu, clk_feature_map[i].feature)) in vangogh_unforce_dpm_levels() 2140 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT) && in vangogh_post_smu_init() 2301 if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_PPT_BIT)) { in vangogh_set_power_limit() 2439 .feature_is_enabled = smu_cmn_feature_is_enabled,
|
/linux-6.3-rc2/drivers/gpu/drm/amd/pm/swsmu/ |
A D | smu_cmn.h | 60 int smu_cmn_feature_is_enabled(struct smu_context *smu,
|
A D | smu_cmn.c | 519 int smu_cmn_feature_is_enabled(struct smu_context *smu, in smu_cmn_feature_is_enabled() function 580 if (!smu_cmn_feature_is_enabled(smu, feature_id)) in smu_cmn_clk_dpm_is_enabled()
|
/linux-6.3-rc2/drivers/gpu/drm/amd/pm/swsmu/smu12/ |
A D | renoir_ppt.c | 655 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) { in renoir_dpm_set_vcn_enable() 661 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) { in renoir_dpm_set_vcn_enable() 676 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_JPEG_PG_BIT)) { in renoir_dpm_set_jpeg_enable() 682 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_JPEG_PG_BIT)) { in renoir_dpm_set_jpeg_enable() 735 if (!smu_cmn_feature_is_enabled(smu, clk_feature_map[i].feature)) in renoir_unforce_dpm_levels() 1446 .feature_is_enabled = smu_cmn_feature_is_enabled,
|