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/linux-6.3-rc2/drivers/gpu/drm/i915/gt/
A Dintel_sseu.c163 sseu->eu_total = compute_eu_total(sseu); in gen11_compute_sseu_info()
183 sseu->eu_total = compute_eu_total(sseu); in xehp_compute_sseu_info()
209 struct sseu_dev_info *sseu = &gt->info.sseu; in xehp_sseu_info_init() local
257 struct sseu_dev_info *sseu = &gt->info.sseu; in gen12_sseu_info_init() local
298 struct sseu_dev_info *sseu = &gt->info.sseu; in gen11_sseu_info_init() local
332 struct sseu_dev_info *sseu = &gt->info.sseu; in cherryview_sseu_info_init() local
362 sseu->eu_total = compute_eu_total(sseu); in cherryview_sseu_info_init()
385 struct sseu_dev_info *sseu = &gt->info.sseu; in gen9_sseu_info_init() local
443 sseu->eu_total = compute_eu_total(sseu); in gen9_sseu_info_init()
552 sseu->eu_total = compute_eu_total(sseu); in bdw_sseu_info_init()
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A Dintel_sseu_debugfs.c88 sseu->subslice_mask.hsw[s] = info->sseu.subslice_mask.hsw[s]; in gen11_sseu_device_status()
143 sseu->subslice_mask.hsw[s] = info->sseu.subslice_mask.hsw[s]; in gen9_sseu_device_status()
178 sseu->eu_per_subslice = info->sseu.eu_per_subslice; in bdw_sseu_device_status()
180 sseu->subslice_mask.hsw[s] = info->sseu.subslice_mask.hsw[s]; in bdw_sseu_device_status()
181 sseu->eu_total = sseu->eu_per_subslice * in bdw_sseu_device_status()
201 sseu->slice_mask); in i915_print_sseu_info()
208 sseu->eu_total); in i915_print_sseu_info()
246 sseu = kzalloc(sizeof(*sseu), GFP_KERNEL); in intel_sseu_status()
247 if (!sseu) in intel_sseu_status()
250 intel_sseu_set_info(sseu, info->sseu.max_slices, in intel_sseu_status()
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A Dintel_sseu.h112 .slice_mask = sseu->slice_mask, in intel_sseu_from_device_info()
113 .subslice_mask = sseu->subslice_mask.hsw[0], in intel_sseu_from_device_info()
125 if (slice >= sseu->max_slices || in intel_sseu_has_subslice()
126 subslice >= sseu->max_subslices) in intel_sseu_has_subslice()
129 if (sseu->has_xehp_dss) in intel_sseu_has_subslice()
144 return find_next_bit(sseu->subslice_mask.xehp, in intel_sseu_find_first_xehp_dss()
145 XEHP_BITMAP_BITS(sseu->subslice_mask), in intel_sseu_find_first_xehp_dss()
168 const struct sseu_dev_info *sseu,
174 const struct sseu_dev_info *sseu);
176 const struct sseu_dev_info *sseu);
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A Dintel_context_sseu.c18 const struct intel_sseu sseu) in gen8_emit_rpcs_config() argument
33 *cs++ = intel_sseu_make_rpcs(rq->engine->gt, &sseu); in gen8_emit_rpcs_config()
41 gen8_modify_rpcs(struct intel_context *ce, const struct intel_sseu sseu) in gen8_modify_rpcs() argument
66 ret = gen8_emit_rpcs_config(rq, ce, sseu); in gen8_modify_rpcs()
76 const struct intel_sseu sseu) in intel_context_reconfigure_sseu() argument
87 if (!memcmp(&ce->sseu, &sseu, sizeof(sseu))) in intel_context_reconfigure_sseu()
90 ret = gen8_modify_rpcs(ce, sseu); in intel_context_reconfigure_sseu()
92 ce->sseu = sseu; in intel_context_reconfigure_sseu()
A Dintel_gt_mcr.h57 intel_sseu_has_subslice(&(gt_)->info.sseu, 0, ss_) : \
58 intel_sseu_has_subslice(&(gt_)->info.sseu, group_, instance_))
A Dintel_workarounds.c532 if (!is_power_of_2(gt->info.sseu.subslice_7eu[i])) in skl_tune_iz_hashing()
541 ss = ffs(gt->info.sseu.subslice_7eu[i]) - 1; in skl_tune_iz_hashing()
1081 const struct sseu_dev_info *sseu = &to_gt(i915)->info.sseu; in gen9_wa_init_mcr() local
1098 slice = ffs(sseu->slice_mask) - 1; in gen9_wa_init_mcr()
1099 GEM_BUG_ON(slice >= ARRAY_SIZE(sseu->subslice_mask.hsw)); in gen9_wa_init_mcr()
1100 subslice = ffs(intel_sseu_get_hsw_subslices(sseu, slice)); in gen9_wa_init_mcr()
1242 const struct sseu_dev_info *sseu = &gt->info.sseu; in icl_wa_init_mcr() local
1246 GEM_BUG_ON(hweight8(sseu->slice_mask) > 1); in icl_wa_init_mcr()
1257 subslice = __ffs(intel_sseu_get_hsw_subslices(sseu, 0)); in icl_wa_init_mcr()
1273 const struct sseu_dev_info *sseu = &gt->info.sseu; in xehp_init_mcr() local
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A Dintel_gt_types.h264 struct sseu_dev_info sseu; member
A Dintel_context_types.h172 struct intel_sseu sseu; member
A Dintel_context.c385 ce->sseu = engine->sseu; in intel_context_init()
A Dintel_gt_mcr.c155 intel_slicemask_from_xehp_dssmask(gt->info.sseu.subslice_mask, in intel_gt_mcr_init()
619 dss = intel_sseu_find_first_xehp_dss(&gt->info.sseu, 0, 0); in get_nonterminated_steering()
A Dintel_context.h47 const struct intel_sseu sseu);
A Dintel_engine_types.h389 struct intel_sseu sseu; member
A Dintel_engine_cs.c823 int ss_per_ccs = info->sseu.max_subslices / I915_MAX_CCS; in engine_mask_apply_compute_fuses()
833 ccs_mask = intel_slicemask_from_xehp_dssmask(info->sseu.compute_subslice_mask, in engine_mask_apply_compute_fuses()
1178 engine->sseu = in engine_setup_common()
1179 intel_sseu_from_device_info(&engine->gt->info.sseu); in engine_setup_common()
A Dintel_gt.c982 intel_sseu_dump(&info->sseu, p); in intel_gt_info_print()
A Dintel_lrc.c1495 intel_sseu_make_rpcs(engine->gt, &ce->sseu); in lrc_update_regs()
/linux-6.3-rc2/drivers/gpu/drm/i915/
A Di915_query.c44 if (sseu->max_slices == 0) in fill_topology_info()
49 eu_length = sseu->max_slices * sseu->max_subslices * eu_stride; in fill_topology_info()
59 topo.max_slices = sseu->max_slices; in fill_topology_info()
73 &sseu->slice_mask, slice_length)) in fill_topology_info()
78 sseu)) in fill_topology_info()
84 sseu)) in fill_topology_info()
93 const struct sseu_dev_info *sseu = &to_gt(dev_priv)->info.sseu; in query_topology_info() local
98 return fill_topology_info(sseu, query_item, sseu->subslice_mask); in query_topology_info()
104 const struct sseu_dev_info *sseu; in query_geometry_subslices() local
122 sseu = &engine->gt->info.sseu; in query_geometry_subslices()
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A Di915_getparam.c18 const struct sseu_dev_info *sseu = &to_gt(i915)->info.sseu; in i915_getparam_ioctl() local
76 value = intel_sseu_subslice_total(sseu); in i915_getparam_ioctl()
81 value = sseu->eu_total; in i915_getparam_ioctl()
98 value = sseu->min_eu_in_pool; in i915_getparam_ioctl()
155 value = sseu->slice_mask; in i915_getparam_ioctl()
165 value = intel_sseu_get_hsw_subslices(sseu, 0); in i915_getparam_ioctl()
A Di915_perf_types.h397 struct intel_sseu sseu; member
A Di915_perf.c372 struct intel_sseu sseu; member
2517 flex->value = intel_sseu_make_rpcs(ce->engine->gt, &ce->sseu); in gen8_configure_context()
2664 regs[0].value = intel_sseu_make_rpcs(engine->gt, &ce->sseu); in oa_configure_all_contexts()
3108 const struct sseu_dev_info *devinfo_sseu = &engine->gt->info.sseu; in get_default_sseu_config()
3318 stream->engine->gt->perf.sseu = props->sseu; in i915_oa_stream_init()
3828 get_default_sseu_config(&props->sseu, props->engine); in i915_perf_open_ioctl_locked()
4085 ret = get_sseu_config(&props->sseu, props->engine, &user_sseu); in read_properties_unlocked()
A Di915_gpu_error.c724 intel_sseu_print_topology(gt->_gt->i915, &gt->info.sseu, &p); in err_print_gt_info()
/linux-6.3-rc2/drivers/gpu/drm/i915/gem/
A Di915_gem_context.c818 struct intel_sseu *sseu; in set_proto_ctx_sseu() local
853 sseu = &pe->sseu; in set_proto_ctx_sseu()
863 sseu = &pc->legacy_rcs_sseu; in set_proto_ctx_sseu()
959 struct intel_sseu sseu) in intel_context_set_gem() argument
986 ret = intel_context_reconfigure_sseu(ce, sseu); in intel_context_set_gem()
1109 struct intel_sseu sseu = {}; in default_engines() local
1128 sseu = rcs_sseu; in default_engines()
1130 ret = intel_context_set_gem(ce, ctx, sseu); in default_engines()
1990 struct intel_sseu sseu; in set_sseu() local
2028 ret = intel_context_reconfigure_sseu(ce, sseu); in set_sseu()
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A Di915_gem_context_types.h125 struct intel_sseu sseu; member
/linux-6.3-rc2/drivers/gpu/drm/i915/gem/selftests/
A Di915_gem_context.c1161 unsigned int slices = hweight32(ce->engine->sseu.slice_mask); in __sseu_finish()
1202 struct intel_sseu sseu) in __sseu_test() argument
1213 ret = intel_context_reconfigure_sseu(ce, sseu); in __sseu_test()
1218 hweight32(sseu.slice_mask), spin); in __sseu_test()
1263 if (hweight32(engine->sseu.slice_mask) < 2) in __igt_ctx_sseu()
1266 if (!engine->gt->info.sseu.has_slice_pg) in __igt_ctx_sseu()
1273 pg_sseu = engine->sseu; in __igt_ctx_sseu()
1276 ~(~0 << (hweight32(engine->sseu.subslice_mask) / 2)); in __igt_ctx_sseu()
1280 hweight32(engine->sseu.slice_mask), in __igt_ctx_sseu()
1294 ret = __sseu_test(name, flags, ce, obj, engine->sseu); in __igt_ctx_sseu()
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/linux-6.3-rc2/drivers/gpu/drm/i915/gt/uc/
A Dintel_guc_capture.c302 struct sseu_dev_info *sseu; in guc_capture_alloc_steered_lists_xe_lpd() local
313 sseu = &gt->info.sseu; in guc_capture_alloc_steered_lists_xe_lpd()
357 struct sseu_dev_info *sseu; in guc_capture_alloc_steered_lists_xe_hpg() local
374 sseu = &gt->info.sseu; in guc_capture_alloc_steered_lists_xe_hpg()
A Dintel_guc_ads.c775 hweight8(gt->info.sseu.slice_mask)); in __guc_ads_init()

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