Home
last modified time | relevance | path

Searched refs:swizzle (Results 1 – 25 of 31) sorted by relevance

12

/linux-6.3-rc2/arch/arm/include/asm/mach/
A Dpci.h27 u8 (*swizzle)(struct pci_dev *dev, u8 *pin); member
44 u8 (*swizzle)(struct pci_dev *, u8 *); member
/linux-6.3-rc2/drivers/gpu/drm/i915/gem/selftests/
A Di915_gem_client_blt.c34 int swizzle, subtile; in linear_x_y_to_ftiled_pos() local
70 swizzle = f_subtile_map[subtile]; in linear_x_y_to_ftiled_pos()
74 swizzle * F_SUBTILE_SIZE + in linear_x_y_to_ftiled_pos()
363 unsigned int swizzle; in tiled_offset() local
375 swizzle = I915_BIT_6_SWIZZLE_NONE; in tiled_offset()
382 swizzle = gt->ggtt->bit_6_swizzle_x; in tiled_offset()
392 swizzle = gt->ggtt->bit_6_swizzle_y; in tiled_offset()
395 switch (swizzle) { in tiled_offset()
A Di915_gem_mman.c36 unsigned int swizzle; member
74 switch (tile->swizzle) { in tiled_offset()
358 tile.swizzle = I915_BIT_6_SWIZZLE_NONE; in igt_partial_tiling()
383 tile.swizzle = to_gt(i915)->ggtt->bit_6_swizzle_x; in igt_partial_tiling()
386 tile.swizzle = to_gt(i915)->ggtt->bit_6_swizzle_y; in igt_partial_tiling()
391 if (tile.swizzle == I915_BIT_6_SWIZZLE_9_17 || in igt_partial_tiling()
392 tile.swizzle == I915_BIT_6_SWIZZLE_9_10_17) in igt_partial_tiling()
499 tile.swizzle = I915_BIT_6_SWIZZLE_NONE; in igt_smoke_tiling()
503 tile.swizzle = to_gt(i915)->ggtt->bit_6_swizzle_x; in igt_smoke_tiling()
510 if (tile.swizzle == I915_BIT_6_SWIZZLE_9_17 || in igt_smoke_tiling()
[all …]
/linux-6.3-rc2/arch/arm/kernel/
A Dbios32.c367 if (sys->swizzle) in pcibios_swizzle()
368 slot = sys->swizzle(dev, pin); in pcibios_swizzle()
445 sys->swizzle = hw->swizzle; in pcibios_init_hw()
/linux-6.3-rc2/arch/arm64/boot/dts/qcom/
A Dsc7180-trogdor-lazor-r0.dts23 * that means we no longer need the swizzle.
/linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/
A Damdgpu_display.c714 int swizzle = AMDGPU_TILING_GET(afb->tiling_flags, SWIZZLE_MODE); in convert_tiling_flags_to_modifier() local
715 bool has_xor = swizzle >= 16; in convert_tiling_flags_to_modifier()
725 switch (swizzle >> 2) { in convert_tiling_flags_to_modifier()
755 switch (swizzle & 3) { in convert_tiling_flags_to_modifier()
1018 int swizzle = AMD_FMT_MOD_GET(TILE, modifier); in amdgpu_display_verify_sizes() local
1020 switch ((swizzle & ~3) + 1) { in amdgpu_display_verify_sizes()
1038 "Swizzle mode with unknown block size: %d\n", swizzle); in amdgpu_display_verify_sizes()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/core/
A Ddc_debug.c170 plane_state->tiling_info.gfx9.swizzle); in pre_surface_trace()
256 update->plane_info->tiling_info.gfx9.swizzle); in update_surface_trace()
A Ddc_hw_sequencer.c461 switch (bottom_pipe_ctx->plane_state->tiling_info.gfx9.swizzle) { in get_surface_tile_visual_confirm_color()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/inc/hw/
A Ddchubbub.h134 enum swizzle_mode_values swizzle,
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_hubbub.h108 enum swizzle_mode_values swizzle,
A Ddcn20_hubbub.c57 enum swizzle_mode_values swizzle, in hubbub2_dcc_support_swizzle() argument
66 switch (swizzle) { in hubbub2_dcc_support_swizzle()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn30/
A Ddcn30_hubbub.c138 enum swizzle_mode_values swizzle, in hubbub3_dcc_support_swizzle() argument
147 switch (swizzle) { in hubbub3_dcc_support_swizzle()
A Ddcn30_hubbub.h114 enum swizzle_mode_values swizzle,
A Ddcn30_hubp.c335 SW_MODE, info->gfx9.swizzle, in hubp3_program_tiling()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/amdgpu_dm/
A Damdgpu_dm_trace.h418 __field(int, swizzle)
450 __entry->swizzle = plane_state->tiling_info.gfx9.swizzle;
484 __entry->swizzle,
A Damdgpu_dm_plane.c281 input.swizzle_mode = tiling_info->gfx9.swizzle; in validate_dcc()
315 tiling_info->gfx9.swizzle = modifier_gfx9_swizzle_mode(modifier); in fill_gfx9_plane_attributes_from_modifiers()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn10/
A Ddcn10_resource.c1230 enum swizzle_mode_values swizzle = DC_SW_LINEAR; in dcn10_patch_unknown_plane_state() local
1233 swizzle = DC_SW_64KB_D; in dcn10_patch_unknown_plane_state()
1235 swizzle = DC_SW_64KB_S; in dcn10_patch_unknown_plane_state()
1237 plane_state->tiling_info.gfx9.swizzle = swizzle; in dcn10_patch_unknown_plane_state()
A Ddcn10_hubbub.c711 enum swizzle_mode_values swizzle, in hubbub1_dcc_support_swizzle() argument
719 switch (swizzle) { in hubbub1_dcc_support_swizzle()
/linux-6.3-rc2/drivers/gpu/drm/i915/
A Di915_debugfs.c378 static const char *swizzle_string(unsigned swizzle) in swizzle_string() argument
380 switch (swizzle) { in swizzle_string()
/linux-6.3-rc2/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/
A Dcom.fuc416 // Calculates the hw swizzle mask and adjusts the surface's xcnt to match
419 // zero out a chunk of the stack to store the swizzle into
435 // convert FORMAT swizzle mask to hw swizzle mask
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn32/
A Ddcn32_resource_helpers.c383 … && !disable_unbounded_requesting && pipe->plane_state->tiling_info.gfx9.swizzle != DC_SW_LINEAR) { in dcn32_set_det_allocations()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/
A Ddc_hw_types.h388 enum swizzle_mode_values swizzle; member
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn20/
A Ddcn20_fpu.c1142 enum swizzle_mode_values swizzle, in swizzle_to_dml_params() argument
1145 switch (swizzle) { in swizzle_to_dml_params()
1573 swizzle_mode_to_macro_tile_size(pln->tiling_info.gfx9.swizzle); in dcn20_populate_dml_pipes_from_context()
1574 swizzle_to_dml_params(pln->tiling_info.gfx9.swizzle, in dcn20_populate_dml_pipes_from_context()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/calcs/
A Ddcn_calcs.c339 input->src.sw_mode = pipe->plane_state->tiling_info.gfx9.swizzle; in pipe_ctx_to_e2e_pipe_params()
348 …src.macro_tile_size = swizzle_mode_to_macro_tile_size(pipe->plane_state->tiling_info.gfx9.swizzle); in pipe_ctx_to_e2e_pipe_params()
1010 pipe->plane_state->tiling_info.gfx9.swizzle); in dcn_validate_bandwidth()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dce/
A Ddce_mem_input.c437 GRPH_SW_MODE, info->gfx9.swizzle, in program_tiling()

Completed in 110 milliseconds

12