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/linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/
A Dgfxhub_v1_0.c196 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in gfxhub_v1_0_init_cache_regs()
200 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in gfxhub_v1_0_init_cache_regs()
226 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, in gfxhub_v1_0_enable_system_domain()
267 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config()
269 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config()
272 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config()
274 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config()
276 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config()
278 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config()
357 tmp = REG_SET_FIELD(tmp, in gfxhub_v1_0_gart_disable()
[all …]
A Dgfxhub_v3_0.c219 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v3_0_init_cache_regs()
222 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v3_0_init_cache_regs()
237 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v3_0_init_cache_regs()
241 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v3_0_init_cache_regs()
263 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, in gfxhub_v3_0_enable_system_domain()
302 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_setup_vmid_config()
304 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_setup_vmid_config()
306 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_setup_vmid_config()
308 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_setup_vmid_config()
310 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_setup_vmid_config()
[all …]
A Dmmhub_v3_0_2.c237 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, in mmhub_v3_0_2_init_cache_regs()
255 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_0_2_init_cache_regs()
259 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_0_2_init_cache_regs()
281 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, in mmhub_v3_0_2_enable_system_domain()
323 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_2_setup_vmid_config()
325 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_2_setup_vmid_config()
328 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_2_setup_vmid_config()
330 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_2_setup_vmid_config()
332 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_2_setup_vmid_config()
334 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_2_setup_vmid_config()
[all …]
A Dgfxhub_v3_0_3.c224 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v3_0_3_init_cache_regs()
227 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v3_0_3_init_cache_regs()
242 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v3_0_3_init_cache_regs()
246 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v3_0_3_init_cache_regs()
268 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, in gfxhub_v3_0_3_enable_system_domain()
307 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_3_setup_vmid_config()
309 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_3_setup_vmid_config()
311 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_3_setup_vmid_config()
313 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_3_setup_vmid_config()
315 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_3_setup_vmid_config()
[all …]
A Dgfxhub_v2_0.c217 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v2_0_init_cache_regs()
220 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v2_0_init_cache_regs()
235 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v2_0_init_cache_regs()
239 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v2_0_init_cache_regs()
261 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, in gfxhub_v2_0_enable_system_domain()
294 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_0_setup_vmid_config()
296 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_0_setup_vmid_config()
298 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_0_setup_vmid_config()
300 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_0_setup_vmid_config()
302 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_0_setup_vmid_config()
[all …]
A Dmmhub_v3_0_1.c238 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, in mmhub_v3_0_1_init_cache_regs()
256 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_0_1_init_cache_regs()
260 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_0_1_init_cache_regs()
282 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, in mmhub_v3_0_1_enable_system_domain()
318 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config()
320 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config()
323 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config()
325 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config()
327 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config()
329 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config()
[all …]
A Dmmhub_v3_0.c245 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, in mmhub_v3_0_init_cache_regs()
263 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_0_init_cache_regs()
267 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_0_init_cache_regs()
289 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, in mmhub_v3_0_enable_system_domain()
331 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_setup_vmid_config()
333 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_setup_vmid_config()
336 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_setup_vmid_config()
338 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_setup_vmid_config()
340 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_setup_vmid_config()
342 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_setup_vmid_config()
[all …]
A Dmmhub_v2_0.c288 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, in mmhub_v2_0_init_cache_regs()
306 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v2_0_init_cache_regs()
310 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v2_0_init_cache_regs()
332 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, in mmhub_v2_0_enable_system_domain()
374 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config()
376 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config()
379 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config()
381 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config()
383 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config()
385 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config()
[all …]
A Dmmhub_v2_3.c212 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, in mmhub_v2_3_init_cache_regs()
230 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v2_3_init_cache_regs()
234 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v2_3_init_cache_regs()
256 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, in mmhub_v2_3_enable_system_domain()
292 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config()
294 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config()
297 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config()
299 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config()
301 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config()
303 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config()
[all …]
A Dlsdma_v6_0.c45 uint32_t tmp; in lsdma_v6_0_copy_mem() local
56 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, BYTE_COUNT, size); in lsdma_v6_0_copy_mem()
57 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, SRC_LOCATION, 0); in lsdma_v6_0_copy_mem()
58 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, DST_LOCATION, 0); in lsdma_v6_0_copy_mem()
59 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, SRC_ADDR_INC, 0); in lsdma_v6_0_copy_mem()
60 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, DST_ADDR_INC, 0); in lsdma_v6_0_copy_mem()
62 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, CONSTANT_FILL, 0); in lsdma_v6_0_copy_mem()
78 uint32_t tmp; in lsdma_v6_0_fill_mem() local
89 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, SRC_LOCATION, 0); in lsdma_v6_0_fill_mem()
90 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, DST_LOCATION, 0); in lsdma_v6_0_fill_mem()
[all …]
A Dmmhub_v1_0.c182 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in mmhub_v1_0_init_cache_regs()
186 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in mmhub_v1_0_init_cache_regs()
204 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, in mmhub_v1_0_enable_system_domain()
249 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in mmhub_v1_0_setup_vmid_config()
251 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in mmhub_v1_0_setup_vmid_config()
254 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in mmhub_v1_0_setup_vmid_config()
256 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in mmhub_v1_0_setup_vmid_config()
258 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in mmhub_v1_0_setup_vmid_config()
260 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in mmhub_v1_0_setup_vmid_config()
353 tmp = REG_SET_FIELD(tmp, in mmhub_v1_0_gart_disable()
[all …]
A Dgfxhub_v2_1.c220 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v2_1_init_cache_regs()
223 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v2_1_init_cache_regs()
238 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v2_1_init_cache_regs()
242 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v2_1_init_cache_regs()
264 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, in gfxhub_v2_1_enable_system_domain()
303 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_1_setup_vmid_config()
305 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_1_setup_vmid_config()
307 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_1_setup_vmid_config()
309 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_1_setup_vmid_config()
311 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_1_setup_vmid_config()
[all …]
A Dgmc_v8_0.c743 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gmc_v8_0_set_fault_enable_default()
745 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gmc_v8_0_set_fault_enable_default()
747 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gmc_v8_0_set_fault_enable_default()
749 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gmc_v8_0_set_fault_enable_default()
776 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v8_0_set_prt()
778 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v8_0_set_prt()
780 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v8_0_set_prt()
782 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v8_0_set_prt()
784 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v8_0_set_prt()
786 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v8_0_set_prt()
[all …]
A Dgmc_v7_0.c522 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gmc_v7_0_set_fault_enable_default()
524 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gmc_v7_0_set_fault_enable_default()
526 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gmc_v7_0_set_fault_enable_default()
528 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gmc_v7_0_set_fault_enable_default()
553 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v7_0_set_prt()
555 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v7_0_set_prt()
557 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v7_0_set_prt()
559 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v7_0_set_prt()
561 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v7_0_set_prt()
563 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v7_0_set_prt()
[all …]
/linux-6.3-rc2/drivers/staging/fbtft/
A Dfb_ssd1331.c144 tmp[i] = acc; in set_gamma()
154 tmp[0], tmp[1], tmp[2], tmp[3], tmp[4], tmp[5], tmp[6], in set_gamma()
155 tmp[7], tmp[8], tmp[9], tmp[10], tmp[11], tmp[12], tmp[13], in set_gamma()
156 tmp[14], tmp[15], tmp[16], tmp[17], tmp[18], tmp[19], tmp[20], in set_gamma()
157 tmp[21], tmp[22], tmp[23], tmp[24], tmp[25], tmp[26], tmp[27], in set_gamma()
158 tmp[28], tmp[29], tmp[30], tmp[31], tmp[32], tmp[33], tmp[34], in set_gamma()
159 tmp[35], tmp[36], tmp[37], tmp[38], tmp[39], tmp[40], tmp[41], in set_gamma()
160 tmp[42], tmp[43], tmp[44], tmp[45], tmp[46], tmp[47], tmp[48], in set_gamma()
161 tmp[49], tmp[50], tmp[51], tmp[52], tmp[53], tmp[54], tmp[55], in set_gamma()
162 tmp[56], tmp[57], tmp[58], tmp[59], tmp[60], tmp[61], in set_gamma()
[all …]
A Dfb_ssd1351.c143 tmp[0], tmp[1], tmp[2], tmp[3], in set_gamma()
144 tmp[4], tmp[5], tmp[6], tmp[7], in set_gamma()
145 tmp[8], tmp[9], tmp[10], tmp[11], in set_gamma()
146 tmp[12], tmp[13], tmp[14], tmp[15], in set_gamma()
147 tmp[16], tmp[17], tmp[18], tmp[19], in set_gamma()
148 tmp[20], tmp[21], tmp[22], tmp[23], in set_gamma()
149 tmp[24], tmp[25], tmp[26], tmp[27], in set_gamma()
150 tmp[28], tmp[29], tmp[30], tmp[31], in set_gamma()
151 tmp[32], tmp[33], tmp[34], tmp[35], in set_gamma()
152 tmp[36], tmp[37], tmp[38], tmp[39], in set_gamma()
[all …]
/linux-6.3-rc2/drivers/gpu/drm/radeon/
A Dradeon_clocks.c453 tmp |= 1; in radeon_legacy_set_engine_clock()
456 tmp |= 2; in radeon_legacy_set_engine_clock()
459 tmp |= 3; in radeon_legacy_set_engine_clock()
462 tmp |= 4; in radeon_legacy_set_engine_clock()
486 tmp &= in radeon_legacy_set_clock_gating()
490 tmp &= in radeon_legacy_set_clock_gating()
501 tmp &= in radeon_legacy_set_clock_gating()
516 tmp |= in radeon_legacy_set_clock_gating()
557 tmp &= in radeon_legacy_set_clock_gating()
624 tmp &= in radeon_legacy_set_clock_gating()
[all …]
A Dvce_v2_0.c41 u32 tmp; in vce_v2_0_set_sw_cg() local
45 tmp |= 0xe70000; in vce_v2_0_set_sw_cg()
53 tmp &= ~0x3fc; in vce_v2_0_set_sw_cg()
59 tmp |= 0xe7; in vce_v2_0_set_sw_cg()
69 tmp |= 0x3fc; in vce_v2_0_set_sw_cg()
76 u32 orig, tmp; in vce_v2_0_set_dyn_cg() local
83 tmp |= 0xe1; in vce_v2_0_set_dyn_cg()
91 if (tmp != orig) in vce_v2_0_set_dyn_cg()
95 tmp &= ~0x3fc; in vce_v2_0_set_dyn_cg()
133 u32 tmp; in vce_v2_0_init_cg() local
[all …]
A Drs400.c66 uint32_t tmp; in rs400_gart_tlb_flush() local
113 uint32_t tmp; in rs400_gart_enable() local
199 uint32_t tmp; in rs400_gart_disable() local
243 uint32_t tmp; in rs400_mc_wait_for_idle() local
311 uint32_t tmp; in rs400_debugfs_gart_info_show() local
346 tmp = RREG32_MC(0x5F); in rs400_debugfs_gart_info_show()
352 tmp = RREG32_MC(0x3B); in rs400_debugfs_gart_info_show()
354 tmp = RREG32_MC(0x3C); in rs400_debugfs_gart_info_show()
356 tmp = RREG32_MC(0x30); in rs400_debugfs_gart_info_show()
358 tmp = RREG32_MC(0x31); in rs400_debugfs_gart_info_show()
[all …]
/linux-6.3-rc2/drivers/scsi/mvsas/
A Dmv_64xx.c31 u32 tmp; in mvs_64xx_enable_xmt() local
81 tmp = reg; in mvs_64xx_stp_reset()
106 u32 tmp; in mvs_64xx_phy_reset() local
127 u32 tmp; in mvs_64xx_clear_srs_irq() local
147 u32 tmp; in mvs_64xx_chip_reset() local
197 u32 tmp; in mvs_64xx_phy_disable() local
219 u32 tmp; in mvs_64xx_phy_enable() local
378 tmp = 0; in mvs_64xx_init()
423 u32 tmp; in mvs_64xx_interrupt_enable() local
432 u32 tmp; in mvs_64xx_interrupt_disable() local
[all …]
/linux-6.3-rc2/drivers/video/fbdev/kyro/
A DSTG4000Ramdac.c29 u32 tmp = 0; in InitialiseRamdac() local
37 if (tmp & 0x1) { in InitialiseRamdac()
53 tmp |= _16BPP; in InitialiseRamdac()
60 tmp |= _32BPP; in InitialiseRamdac()
76 tmp = STG_READ_REG(DACPrimSize); in InitialiseRamdac()
79 tmp |= in InitialiseRamdac()
90 tmp = STG_READ_REG(DACPLLMode); in InitialiseRamdac()
94 STG_WRITE_REG(DACPLLMode, tmp); in InitialiseRamdac()
104 tmp &= ~SET_BIT(31); in InitialiseRamdac()
149 u32 tmp; in DisableRamdacOutput() local
[all …]
A DSTG4000OverlayDevice.c81 u32 tmp; in ResetOverlayRegisters() local
147 u32 tmp; in CreateOverlaySurface() local
246 u32 tmp; in SetOverlayBlendMode() local
250 tmp |= (mode << 28); in SetOverlayBlendMode()
290 u32 tmp; in EnableOverlayPlane() local
293 tmp |= SET_BIT(7); in EnableOverlayPlane()
342 u32 tmp, ulStride; in SetOverlayViewPort() local
414 tmp = ulPattern; in SetOverlayViewPort()
567 tmp |= in SetOverlayViewPort()
571 tmp |= in SetOverlayViewPort()
[all …]
/linux-6.3-rc2/drivers/gpu/drm/mgag200/
A Dmgag200_bmc.c9 u8 tmp; in mgag200_bmc_disable_vidrst() local
18 tmp = RREG8(DAC_DATA); in mgag200_bmc_disable_vidrst()
19 tmp |= 0x10; in mgag200_bmc_disable_vidrst()
24 tmp = RREG8(DAC_DATA); in mgag200_bmc_disable_vidrst()
25 tmp |= 0x10; in mgag200_bmc_disable_vidrst()
35 tmp |= 0x80; in mgag200_bmc_disable_vidrst()
68 u8 tmp; in mgag200_bmc_enable_vidrst() local
78 tmp |= 0x8; in mgag200_bmc_enable_vidrst()
84 tmp &= ~0x08; in mgag200_bmc_enable_vidrst()
91 tmp &= ~0x80; in mgag200_bmc_enable_vidrst()
[all …]
/linux-6.3-rc2/arch/csky/kernel/probes/
A Dsimulate-insn.c127 csky_insn_reg_get_val(regs, tmp, &tmp); in simulate_jmp16()
137 csky_insn_reg_get_val(regs, tmp, &tmp); in simulate_jmp32()
147 csky_insn_reg_get_val(regs, tmp, &tmp); in simulate_jsr16()
159 csky_insn_reg_get_val(regs, tmp, &tmp); in simulate_jsr32()
201 tmp += 1; in simulate_pop16()
206 tmp += 1; in simulate_pop16()
222 tmp += 1; in simulate_pop32()
227 tmp += 1; in simulate_pop32()
232 tmp += 1; in simulate_pop32()
250 csky_insn_reg_get_val(regs, tmp, &tmp); in simulate_bez32()
[all …]
/linux-6.3-rc2/drivers/pnp/isapnp/
A Dcore.c390 eisa_id = tmp[0] | tmp[1] << 8 | tmp[2] << 16 | tmp[3] << 24; in isapnp_parse_device()
514 min = (tmp[4] << 24) | (tmp[3] << 16) | (tmp[2] << 8) | tmp[1]; in isapnp_parse_mem32_resource()
515 max = (tmp[8] << 24) | (tmp[7] << 16) | (tmp[6] << 8) | tmp[5]; in isapnp_parse_mem32_resource()
516 align = (tmp[12] << 24) | (tmp[11] << 16) | (tmp[10] << 8) | tmp[9]; in isapnp_parse_mem32_resource()
517 len = (tmp[16] << 24) | (tmp[15] << 16) | (tmp[14] << 8) | tmp[13]; in isapnp_parse_mem32_resource()
535 base = (tmp[4] << 24) | (tmp[3] << 16) | (tmp[2] << 8) | tmp[1]; in isapnp_parse_fixed_mem32_resource()
536 len = (tmp[8] << 24) | (tmp[7] << 16) | (tmp[6] << 8) | tmp[5]; in isapnp_parse_fixed_mem32_resource()
893 for (tmp = 0; tmp < ISAPNP_MAX_PORT; tmp++) { in isapnp_set_resources()
902 for (tmp = 0; tmp < ISAPNP_MAX_IRQ; tmp++) { in isapnp_set_resources()
912 for (tmp = 0; tmp < ISAPNP_MAX_DMA; tmp++) { in isapnp_set_resources()
[all …]

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