Searched refs:training_lane (Results 1 – 3 of 3) sorted by relevance
152 u8 training_lane[4]; member225 u32 training_lane);227 u32 training_lane);229 u32 training_lane);231 u32 training_lane);
447 u8 voltage_swing, pre_emphasis, training_lane; in analogix_dp_get_adjust_training_lane() local459 training_lane |= DP_TRAIN_MAX_SWING_REACHED; in analogix_dp_get_adjust_training_lane()463 dp->link_train.training_lane[lane] = training_lane; in analogix_dp_get_adjust_training_lane()470 u8 voltage_swing, pre_emphasis, training_lane; in analogix_dp_process_clock_recovery() local507 if (DPCD_VOLTAGE_SWING_GET(training_lane) == in analogix_dp_process_clock_recovery()509 DPCD_PRE_EMPHASIS_GET(training_lane) == in analogix_dp_process_clock_recovery()529 dp->link_train.training_lane[lane], lane); in analogix_dp_process_clock_recovery()532 dp->link_train.training_lane, lane_count); in analogix_dp_process_clock_recovery()603 dp->link_train.training_lane[lane], lane); in analogix_dp_process_equalizer_training()606 dp->link_train.training_lane, lane_count); in analogix_dp_process_equalizer_training()[all …]
654 u32 training_lane) in analogix_dp_set_lane0_link_training() argument658 reg = training_lane; in analogix_dp_set_lane0_link_training()663 u32 training_lane) in analogix_dp_set_lane1_link_training() argument667 reg = training_lane; in analogix_dp_set_lane1_link_training()672 u32 training_lane) in analogix_dp_set_lane2_link_training() argument676 reg = training_lane; in analogix_dp_set_lane2_link_training()681 u32 training_lane) in analogix_dp_set_lane3_link_training() argument685 reg = training_lane; in analogix_dp_set_lane3_link_training()
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