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Searched refs:vdd_dep_on_mclk (Results 1 – 12 of 12) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
A Dvega10_hwmgr.c332 dep_table[1] = table_info->vdd_dep_on_mclk; in vega10_odn_initial_default_setting()
668 table_info->vdd_dep_on_mclk; in vega10_patch_voltage_dependency_tables_with_lookup_table()
773 table_info->vdd_dep_on_mclk; in vega10_set_private_data_based_on_pptable()
1169 table_info->vdd_dep_on_mclk, in vega10_construct_voltage_tables()
1178 table_info->vdd_dep_on_mclk, in vega10_construct_voltage_tables()
1309 table_info->vdd_dep_on_mclk; in vega10_setup_default_dpm_tables()
1824 &data->odn_dpm_table.vdd_dep_on_mclk; in vega10_populate_single_memory_level()
2522 dep_table = table_info->vdd_dep_on_mclk; in vega10_check_dpm_table_updated()
3025 …hwmgr->pstate_mclk_peak = table_info->vdd_dep_on_mclk->entries[table_info->vdd_dep_on_mclk->count … in vega10_populate_umdpstate_clocks()
4396 table_info->vdd_dep_on_mclk; in vega10_get_memclocks()
[all …]
A Dprocess_pptables_v1_0.c819 pp_table_information->vdd_dep_on_mclk = NULL; in init_clock_voltage_dependency()
838 &pp_table_information->vdd_dep_on_mclk, mclk_dep_table); in init_clock_voltage_dependency()
857 if (result == 0 && (NULL != pp_table_information->vdd_dep_on_mclk) in init_clock_voltage_dependency()
858 && (0 != pp_table_information->vdd_dep_on_mclk->count)) in init_clock_voltage_dependency()
860 pp_table_information->vdd_dep_on_mclk); in init_clock_voltage_dependency()
1198 kfree(pp_table_information->vdd_dep_on_mclk); in pp_tables_v1_0_uninitialize()
1199 pp_table_information->vdd_dep_on_mclk = NULL; in pp_tables_v1_0_uninitialize()
A Dvega10_processpptables.c926 pp_table_info->vdd_dep_on_mclk = NULL; in init_powerplay_extended_tables()
979 &pp_table_info->vdd_dep_on_mclk, in init_powerplay_extended_tables()
1023 pp_table_info->vdd_dep_on_mclk && in init_powerplay_extended_tables()
1024 pp_table_info->vdd_dep_on_mclk->count) in init_powerplay_extended_tables()
1027 pp_table_info->vdd_dep_on_mclk); in init_powerplay_extended_tables()
1204 kfree(pp_table_info->vdd_dep_on_mclk); in vega10_pp_tables_uninitialize()
1205 pp_table_info->vdd_dep_on_mclk = NULL; in vega10_pp_tables_uninitialize()
A Dsmu10_hwmgr.h202 struct smu10_voltage_dependency_table *vdd_dep_on_mclk; member
A Dvega10_hwmgr.h296 struct vega10_odn_clock_voltage_dependency_table vdd_dep_on_mclk; member
A Dsmu7_hwmgr.c334 table_info->vdd_dep_on_mclk); in smu7_construct_voltage_tables()
354 table_info->vdd_dep_on_mclk); in smu7_construct_voltage_tables()
881 dep_mclk_table = table_info->vdd_dep_on_mclk; in smu7_setup_dpm_tables_v1()
948 dep_mclk_table = table_info->vdd_dep_on_mclk; in smu7_odn_initial_default_setting()
1035 dep_table = table_info->vdd_dep_on_mclk; in smu7_check_dpm_table_updated()
2222 table_info->vdd_dep_on_mclk; in smu7_patch_voltage_dependency_tables_with_lookup_table()
2466 table_info->vdd_dep_on_mclk; in smu7_set_private_data_based_on_pptable_v1()
2514 dep_mclk_table = table_info->vdd_dep_on_mclk; in smu7_patch_voltage_workaround()
3705 table_info->vdd_dep_on_mclk; in smu7_get_pp_table_entry_v1()
5267 table_info->vdd_dep_on_mclk; in smu7_get_mclks_with_latency()
[all …]
A Dsmu10_hwmgr.c518 smu10_get_clock_voltage_dependency_table(hwmgr, &pinfo->vdd_dep_on_mclk, in smu10_populate_clock_table()
1177 pclk_vol_table = pinfo->vdd_dep_on_mclk; in smu10_get_clock_by_type_with_latency()
1233 pclk_vol_table = pinfo->vdd_dep_on_mclk; in smu10_get_clock_by_type_with_voltage()
/linux-6.3-rc2/drivers/gpu/drm/amd/pm/powerplay/smumgr/
A Dvegam_smumgr.c992 if (table_info->vdd_dep_on_mclk) { in vegam_populate_single_memory_level()
994 table_info->vdd_dep_on_mclk, clock, in vegam_populate_single_memory_level()
1096 for (i = 0; i < table_info->vdd_dep_on_mclk->count; i++) { in vegam_populate_mvdd_value()
1097 if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) { in vegam_populate_mvdd_value()
1102 PP_ASSERT_WITH_CODE(i < table_info->vdd_dep_on_mclk->count, in vegam_populate_mvdd_value()
1166 table_info->vdd_dep_on_mclk, in vegam_populate_smc_acpi_level()
1420 count = (uint8_t)(table_info->vdd_dep_on_mclk->count); in vegam_populate_smc_initial_state()
1422 if (table_info->vdd_dep_on_mclk->entries[level].clk >= in vegam_populate_smc_initial_state()
A Dfiji_smumgr.c1174 vdd_dep_table = table_info->vdd_dep_on_mclk; in fiji_populate_single_memory_level()
1281 for (i = 0; i < table_info->vdd_dep_on_mclk->count; i++) { in fiji_populate_mvdd_value()
1282 if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) { in fiji_populate_mvdd_value()
1287 PP_ASSERT_WITH_CODE(i < table_info->vdd_dep_on_mclk->count, in fiji_populate_mvdd_value()
1376 table_info->vdd_dep_on_mclk, in fiji_populate_smc_acpi_level()
1648 count = (uint8_t)(table_info->vdd_dep_on_mclk->count); in fiji_populate_smc_initailial_state()
1650 if (table_info->vdd_dep_on_mclk->entries[level].clk >= in fiji_populate_smc_initailial_state()
A Dpolaris10_smumgr.c1167 vdd_dep_table = table_info->vdd_dep_on_mclk; in polaris10_populate_single_memory_level()
1262 for (i = 0; i < table_info->vdd_dep_on_mclk->count; i++) { in polaris10_populate_mvdd_value()
1263 if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) { in polaris10_populate_mvdd_value()
1268 PP_ASSERT_WITH_CODE(i < table_info->vdd_dep_on_mclk->count, in polaris10_populate_mvdd_value()
1329 table_info->vdd_dep_on_mclk, in polaris10_populate_smc_acpi_level()
1635 count = (uint8_t)(table_info->vdd_dep_on_mclk->count); in polaris10_populate_smc_initailial_state()
1637 if (table_info->vdd_dep_on_mclk->entries[level].clk >= in polaris10_populate_smc_initailial_state()
A Dtonga_smumgr.c980 vdd_dep_table = pptable_info->vdd_dep_on_mclk; in tonga_populate_single_memory_level()
1153 for (i = 0; i < table_info->vdd_dep_on_mclk->count; i++) { in tonga_populate_mvdd_value()
1154 if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) { in tonga_populate_mvdd_value()
1162 PP_ASSERT_WITH_CODE(i < table_info->vdd_dep_on_mclk->count, in tonga_populate_mvdd_value()
/linux-6.3-rc2/drivers/gpu/drm/amd/pm/powerplay/inc/
A Dhwmgr.h536 struct phm_ppt_v1_clock_voltage_dependency_table *vdd_dep_on_mclk; member
565 struct phm_ppt_v1_clock_voltage_dependency_table *vdd_dep_on_mclk; member

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