Home
last modified time | relevance | path

Searched refs:vreg (Results 1 – 25 of 66) sorted by relevance

123

/linux-6.3-rc2/drivers/regulator/
A Dqcom-labibb-regulator.c150 ret = regmap_read(vreg->rdev->regmap, vreg->base + REG_LABIBB_STATUS1, in qcom_labibb_check_ocp_status()
372 return devm_request_threaded_irq(vreg->dev, vreg->ocp_irq, NULL, in qcom_labibb_set_ocp()
502 vreg->sc_count = 0; in qcom_labibb_sc_recovery_worker()
512 vreg->sc_count++; in qcom_labibb_sc_recovery_worker()
582 ret = regmap_write(vreg->regmap, vreg->base + REG_LABIBB_SEC_ACCESS, in qcom_labibb_set_current_limit()
803 vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg), in qcom_labibb_regulator_probe()
805 if (!vreg) in qcom_labibb_regulator_probe()
838 vreg->dev = dev; in qcom_labibb_regulator_probe()
865 memcpy(&vreg->desc, reg_data->desc, sizeof(vreg->desc)); in qcom_labibb_regulator_probe()
873 vreg->rdev = devm_regulator_register(vreg->dev, &vreg->desc, in qcom_labibb_regulator_probe()
[all …]
A Dqcom_rpm-regulator.c227 vreg->uV = uV; in rpm_reg_set_mV_sel()
254 vreg->uV = uV; in rpm_reg_set_uV_sel()
264 return vreg->uV; in rpm_reg_get_voltage()
278 ret = rpm_reg_write(vreg, req, vreg->uV / 1000); in rpm_reg_mV_enable()
297 ret = rpm_reg_write(vreg, req, vreg->uV); in rpm_reg_uV_enable()
667 rpm_reg_set(vreg, &vreg->parts->freq, i + 1); in rpm_reg_of_parse_freq()
690 ret = rpm_reg_set(vreg, &vreg->parts->pd, 1); in rpm_reg_of_parse()
707 ret = rpm_reg_set(vreg, &vreg->parts->pm, pwm); in rpm_reg_of_parse()
761 ret = rpm_reg_set(vreg, &vreg->parts->fm, force_mode); in rpm_reg_of_parse()
960 if (!vreg) in rpm_reg_probe()
[all …]
A Dqcom_spmi-regulator.c627 return regmap_bulk_read(vreg->regmap, vreg->base + addr, buf, len); in spmi_vreg_read()
633 return regmap_bulk_write(vreg->regmap, vreg->base + addr, buf, len); in spmi_vreg_write()
683 dev_err(vreg->dev, in spmi_regulator_select_voltage()
707 dev_err(vreg->dev, in spmi_regulator_select_voltage()
1309 vreg->ocp_count++; in spmi_regulator_vs_ocp_isr()
1314 } else if (vreg->ocp_count <= vreg->ocp_max_retries) { in spmi_regulator_vs_ocp_isr()
2008 vreg); in spmi_regulator_of_parse()
2421 vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL); in qcom_spmi_regulator_probe()
2422 if (!vreg) in qcom_spmi_regulator_probe()
2425 vreg->dev = dev; in qcom_spmi_regulator_probe()
[all …]
A Dqcom-rpmh-regulator.c224 return vreg->enabled; in rpmh_regulator_is_enabled()
294 ret = rpmh_regulator_vrm_set_mode_bypass(vreg, mode, vreg->bypassed); in rpmh_regulator_vrm_set_mode()
296 vreg->mode = mode; in rpmh_regulator_vrm_set_mode()
305 return vreg->mode; in rpmh_regulator_vrm_get_mode()
340 ret = rpmh_regulator_vrm_set_mode_bypass(vreg, vreg->mode, enable); in rpmh_regulator_vrm_set_bypass()
423 vreg->dev = dev; in rpmh_regulator_init_vreg()
438 if (!vreg->addr) { in rpmh_regulator_init_vreg()
463 vreg->rdesc.ops = vreg->hw_data->ops; in rpmh_regulator_init_vreg()
464 vreg->rdesc.of_map_mode = vreg->hw_data->of_map_mode; in rpmh_regulator_init_vreg()
1336 vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL); in rpmh_regulator_probe()
[all …]
A Dpcap-regulator.c151 return ezx_pcap_set_bits(pcap, vreg->reg, in pcap_regulator_set_voltage_sel()
152 (rdev->desc->n_voltages - 1) << vreg->index, in pcap_regulator_set_voltage_sel()
153 selector << vreg->index); in pcap_regulator_set_voltage_sel()
165 ezx_pcap_read(pcap, vreg->reg, &tmp); in pcap_regulator_get_voltage_sel()
175 if (vreg->en == NA) in pcap_regulator_enable()
178 return ezx_pcap_set_bits(pcap, vreg->reg, 1 << vreg->en, 1 << vreg->en); in pcap_regulator_enable()
186 if (vreg->en == NA) in pcap_regulator_disable()
189 return ezx_pcap_set_bits(pcap, vreg->reg, 1 << vreg->en, 0); in pcap_regulator_disable()
198 if (vreg->en == NA) in pcap_regulator_is_enabled()
201 ezx_pcap_read(pcap, vreg->reg, &tmp); in pcap_regulator_is_enabled()
[all …]
A Dmt6358-regulator.c40 [MT6358_ID_##vreg] = { \
42 .name = #vreg, \
68 [MT6358_ID_##vreg] = { \
70 .name = #vreg, \
92 [MT6358_ID_##vreg] = { \
94 .name = #vreg, \
118 .name = #vreg, \
138 .name = #vreg, \
166 .name = #vreg, \
190 .name = #vreg, \
[all …]
A Dmt6357-regulator.c38 [MT6357_ID_##vreg] = { \
40 .name = #vreg, \
45 .id = MT6357_ID_##vreg, \
61 [MT6357_ID_##vreg] = { \
63 .name = #vreg, \
68 .id = MT6357_ID_##vreg, \
81 [MT6357_ID_##vreg] = { \
83 .name = #vreg, \
88 .id = MT6357_ID_##vreg, \
103 [MT6357_ID_##vreg] = { \
[all …]
A Dqcom_smd-regulator.c57 if (vreg->uv_updated && vreg->is_enabled) { in rpm_reg_write_active()
64 if (vreg->load_updated && vreg->is_enabled) { in rpm_reg_write_active()
75 vreg->type, vreg->id, in rpm_reg_write_active()
91 vreg->is_enabled = 1; in rpm_reg_enable()
127 return vreg->uV; in rpm_reg_get_voltage()
139 vreg->uV = min_uV; in rpm_reg_set_voltage()
144 vreg->uV = old_uV; in rpm_reg_set_voltage()
1376 vreg->dev = dev; in rpm_regulator_init_vreg()
1381 memcpy(&vreg->desc, rpm_data->desc, sizeof(vreg->desc)); in rpm_regulator_init_vreg()
1422 vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL); in rpm_reg_probe()
[all …]
A Dmt6332-regulator.c49 [MT6332_ID_##vreg] = { \
51 .name = #vreg, \
55 .id = MT6332_ID_##vreg, \
75 [MT6332_ID_##vreg] = { \
77 .name = #vreg, \
81 .id = MT6332_ID_##vreg, \
101 [MT6332_ID_##vreg] = { \
103 .name = #vreg, \
118 [MT6332_ID_##vreg] = { \
120 .name = #vreg, \
[all …]
A Dmt6331-regulator.c49 [MT6331_ID_##vreg] = { \
51 .name = #vreg, \
55 .id = MT6331_ID_##vreg, \
73 [MT6331_ID_##vreg] = { \
75 .name = #vreg, \
79 .id = MT6331_ID_##vreg, \
91 [MT6331_ID_##vreg] = { \
93 .name = #vreg, \
114 [MT6331_ID_##vreg] = { \
116 .name = #vreg, \
[all …]
A D88pm8607.c247 #define PM8607_DVC(vreg, ureg, ubit, ereg, ebit) \ argument
250 .name = #vreg, \
251 .of_match = of_match_ptr(#vreg), \
255 .id = PM8607_ID_##vreg, \
257 .volt_table = vreg##_table, \
258 .n_voltages = ARRAY_SIZE(vreg##_table), \
259 .vsel_reg = PM8607_##vreg, \
260 .vsel_mask = ARRAY_SIZE(vreg##_table) - 1, \
267 .vol_suspend = (unsigned int *)&vreg##_suspend_table, \
270 #define PM8607_LDO(_id, vreg, shift, ereg, ebit) \ argument
[all …]
A Dmt6380-regulator.c91 #define MT6380_BUCK(match, vreg, min, max, step, volt_ranges, enreg, \ argument
94 [MT6380_ID_##vreg] = { \
96 .name = #vreg, \
100 .id = MT6380_ID_##vreg, \
117 [MT6380_ID_##vreg] = { \
119 .name = #vreg, \
123 .id = MT6380_ID_##vreg, \
136 #define MT6380_REG_FIXED(match, vreg, enreg, enbit, volt, \ argument
138 [MT6380_ID_##vreg] = { \
140 .name = #vreg, \
[all …]
A Dmt6397-regulator.c37 #define MT6397_BUCK(match, vreg, min, max, step, volt_ranges, enreg, \ argument
40 [MT6397_ID_##vreg] = { \
42 .name = #vreg, \
46 .id = MT6397_ID_##vreg, \
67 [MT6397_ID_##vreg] = { \
69 .name = #vreg, \
73 .id = MT6397_ID_##vreg, \
85 #define MT6397_REG_FIXED(match, vreg, enreg, enbit, volt) \ argument
86 [MT6397_ID_##vreg] = { \
88 .name = #vreg, \
[all …]
A Dmt6323-regulator.c39 #define MT6323_BUCK(match, vreg, min, max, step, volt_ranges, enreg, \ argument
41 [MT6323_ID_##vreg] = { \
43 .name = #vreg, \
47 .id = MT6323_ID_##vreg, \
65 [MT6323_ID_##vreg] = { \
67 .name = #vreg, \
71 .id = MT6323_ID_##vreg, \
85 #define MT6323_REG_FIXED(match, vreg, enreg, enbit, volt, \ argument
87 [MT6323_ID_##vreg] = { \
89 .name = #vreg, \
[all …]
A D88pm800-regulator.c86 #define PM800_BUCK(match, vreg, ereg, ebit, amax, volt_ranges, n_volt) \ argument
89 .name = #vreg, \
94 .id = PM800_ID_##vreg, \
99 .vsel_reg = PM800_##vreg, \
116 #define PM800_LDO(match, vreg, ereg, ebit, amax, ldo_volt_table) \ argument
119 .name = #vreg, \
124 .id = PM800_ID_##vreg, \
127 .vsel_reg = PM800_##vreg##_VOUT, \
A Dda903x-regulator.c322 .vol_reg = _pmic##_##vreg, \
342 .vol_reg = _pmic##_##vreg, \
351 #define DA9034_LDO(_id, min, max, step, vreg, shift, nbits, ereg, ebit) \ argument
352 DA903x_LDO(DA9034, _id, min, max, step, vreg, shift, nbits, ereg, ebit)
354 #define DA9030_LDO(_id, min, max, step, vreg, shift, nbits, ereg, ebit) \ argument
355 DA903x_LDO(DA9030, _id, min, max, step, vreg, shift, nbits, ereg, ebit)
357 #define DA9030_DVC(_id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \ argument
358 DA903x_DVC(DA9030, _id, min, max, step, vreg, nbits, ureg, ubit, \
361 #define DA9034_DVC(_id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \ argument
362 DA903x_DVC(DA9034, _id, min, max, step, vreg, nbits, ureg, ubit, \
[all …]
A Dhi6421-regulator.c129 #define HI6421_LDO(_id, _match, v_table, vreg, vmask, ereg, emask, \ argument
142 .vsel_reg = HI6421_REG_TO_BUS_ADDR(vreg), \
168 #define HI6421_LDO_LINEAR(_id, _match, _min_uV, n_volt, vstep, vreg, vmask,\ argument
182 .vsel_reg = HI6421_REG_TO_BUS_ADDR(vreg), \
208 #define HI6421_LDO_LINEAR_RANGE(_id, _match, n_volt, volt_ranges, vreg, vmask,\ argument
222 .vsel_reg = HI6421_REG_TO_BUS_ADDR(vreg), \
245 #define HI6421_BUCK012(_id, _match, vreg, vmask, ereg, emask, sleepmask,\ argument
259 .vsel_reg = HI6421_REG_TO_BUS_ADDR(vreg), \
282 #define HI6421_BUCK345(_id, _match, v_table, vreg, vmask, ereg, emask, \ argument
295 .vsel_reg = HI6421_REG_TO_BUS_ADDR(vreg), \
A Dtps6586x-regulator.c122 .vsel_reg = TPS6586X_##vreg, \
133 uv_step, vreg, shift, nbits, ereg0, \ argument
147 .vsel_reg = TPS6586X_##vreg, \
157 #define TPS6586X_LDO(_id, _pname, vdata, vreg, shift, nbits, \ argument
160 TPS6586X_REGULATOR(_id, rw, _pname, vdata, vreg, shift, nbits, \
164 #define TPS6586X_LDO_LINEAR(_id, _pname, n_volt, min_uv, uv_step, vreg, \ argument
168 min_uv, uv_step, vreg, shift, nbits, \
172 #define TPS6586X_FIXED_LDO(_id, _pname, vdata, vreg, shift, nbits, \ argument
175 TPS6586X_REGULATOR(_id, ro, _pname, vdata, vreg, shift, nbits, \
179 #define TPS6586X_DVM(_id, _pname, n_volt, min_uv, uv_step, vreg, shift, \ argument
[all …]
A Dhi655x-regulator.c107 #define HI655X_LDO(_ID, vreg, vmask, ereg, dreg, \ argument
119 .vsel_reg = HI655X_BUS_ADDR(vreg), \
128 #define HI655X_LDO_LINEAR(_ID, vreg, vmask, ereg, dreg, \ argument
141 .vsel_reg = HI655X_BUS_ADDR(vreg), \
/linux-6.3-rc2/drivers/gpu/drm/panel/
A Dpanel-boe-bf060y8m-aj0.c291 struct regulator *vreg; in boe_bf060y8m_aj0_init_vregs() local
306 vreg = boe->vregs[BF060Y8M_VREG_VCC].consumer; in boe_bf060y8m_aj0_init_vregs()
307 ret = regulator_is_supported_voltage(vreg, 2700000, 3600000); in boe_bf060y8m_aj0_init_vregs()
311 vreg = boe->vregs[BF060Y8M_VREG_VDDIO].consumer; in boe_bf060y8m_aj0_init_vregs()
316 vreg = boe->vregs[BF060Y8M_VREG_VCI].consumer; in boe_bf060y8m_aj0_init_vregs()
321 vreg = boe->vregs[BF060Y8M_VREG_EL_VDD].consumer; in boe_bf060y8m_aj0_init_vregs()
327 vreg = boe->vregs[BF060Y8M_VREG_EL_VSS].consumer; in boe_bf060y8m_aj0_init_vregs()
341 vreg = boe->vregs[BF060Y8M_VREG_VDDIO].consumer; in boe_bf060y8m_aj0_init_vregs()
342 ret = regulator_set_current_limit(vreg, 1500, 2500); in boe_bf060y8m_aj0_init_vregs()
347 vreg = boe->vregs[BF060Y8M_VREG_VCI].consumer; in boe_bf060y8m_aj0_init_vregs()
[all …]
/linux-6.3-rc2/drivers/hwmon/pmbus/
A Dzl6100.c140 int ret, vreg; in zl6100_read_word_data() local
160 vreg = MFR_READ_VMON; in zl6100_read_word_data()
164 vreg = MFR_VMON_OV_FAULT_LIMIT; in zl6100_read_word_data()
168 vreg = MFR_VMON_UV_FAULT_LIMIT; in zl6100_read_word_data()
173 vreg = reg; in zl6100_read_word_data()
238 int ret, vreg; in zl6100_write_word_data() local
246 vreg = MFR_VMON_OV_FAULT_LIMIT; in zl6100_write_word_data()
250 vreg = MFR_VMON_OV_FAULT_LIMIT; in zl6100_write_word_data()
255 vreg = MFR_VMON_UV_FAULT_LIMIT; in zl6100_write_word_data()
259 vreg = MFR_VMON_UV_FAULT_LIMIT; in zl6100_write_word_data()
[all …]
/linux-6.3-rc2/drivers/gpu/drm/i915/gvt/
A Ddebugfs.c39 u32 vreg; member
63 u32 preg, vreg; in mmio_diff_handler() local
66 vreg = vgpu_vreg(param->vgpu, offset); in mmio_diff_handler()
68 if (preg != vreg) { in mmio_diff_handler()
75 node->vreg = vreg; in mmio_diff_handler()
113 u32 diff = node->preg ^ node->vreg; in vgpu_mmio_diff_show()
116 node->offset, node->preg, node->vreg, in vgpu_mmio_diff_show()
A Dmmio.c251 memcpy(vgpu->mmio.vreg, mmio, info->mmio_size); in intel_vgpu_reset_mmio()
299 memcpy(vgpu->mmio.vreg, mmio, GVT_GEN8_MMIO_RESET_OFFSET); in intel_vgpu_reset_mmio()
315 vgpu->mmio.vreg = vzalloc(info->mmio_size); in intel_vgpu_init_mmio()
316 if (!vgpu->mmio.vreg) in intel_vgpu_init_mmio()
331 vfree(vgpu->mmio.vreg); in intel_vgpu_clean_mmio()
332 vgpu->mmio.vreg = NULL; in intel_vgpu_clean_mmio()
/linux-6.3-rc2/drivers/ufs/host/
A Dufshcd-pltfrm.c127 struct ufs_vreg *vreg = NULL; in ufshcd_populate_vreg() local
142 vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL); in ufshcd_populate_vreg()
143 if (!vreg) in ufshcd_populate_vreg()
146 vreg->name = devm_kstrdup(dev, name, GFP_KERNEL); in ufshcd_populate_vreg()
147 if (!vreg->name) in ufshcd_populate_vreg()
151 if (of_property_read_u32(np, prop_name, &vreg->max_uA)) { in ufshcd_populate_vreg()
153 vreg->max_uA = 0; in ufshcd_populate_vreg()
156 *out_vreg = vreg; in ufshcd_populate_vreg()
/linux-6.3-rc2/arch/powerpc/boot/
A Dcpm-serial.c201 void *vreg[2]; in cpm_console_init() local
233 if (dt_get_virtual_reg(devp, vreg, 2) < 2) in cpm_console_init()
237 smc = vreg[0]; in cpm_console_init()
239 scc = vreg[0]; in cpm_console_init()
241 param = vreg[1]; in cpm_console_init()

Completed in 72 milliseconds

123