Searched refs:wptr_offset (Results 1 – 7 of 7) sorted by relevance
| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dmub/ |
| A D | dmub_srv.h | 343 void (*set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);
361 void (*emul_set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dmub/src/ |
| A D | dmub_dcn20.c | 290 void dmub_dcn20_set_inbox1_wptr(struct dmub_srv *dmub, uint32_t wptr_offset) in dmub_dcn20_set_inbox1_wptr() argument
292 REG_WRITE(DMCUB_INBOX1_WPTR, wptr_offset); in dmub_dcn20_set_inbox1_wptr()
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| A D | dmub_dcn31.c | 250 void dmub_dcn31_set_inbox1_wptr(struct dmub_srv *dmub, uint32_t wptr_offset) in dmub_dcn31_set_inbox1_wptr() argument
252 REG_WRITE(DMCUB_INBOX1_WPTR, wptr_offset); in dmub_dcn31_set_inbox1_wptr()
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| A D | dmub_dcn32.c | 273 void dmub_dcn32_set_inbox1_wptr(struct dmub_srv *dmub, uint32_t wptr_offset) in dmub_dcn32_set_inbox1_wptr() argument
275 REG_WRITE(DMCUB_INBOX1_WPTR, wptr_offset); in dmub_dcn32_set_inbox1_wptr()
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| A D | dmub_dcn20.h | 207 void dmub_dcn20_set_inbox1_wptr(struct dmub_srv *dmub, uint32_t wptr_offset);
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| A D | dmub_dcn31.h | 209 void dmub_dcn31_set_inbox1_wptr(struct dmub_srv *dmub, uint32_t wptr_offset);
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| A D | dmub_dcn32.h | 211 void dmub_dcn32_set_inbox1_wptr(struct dmub_srv *dmub, uint32_t wptr_offset);
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