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Searched refs:xclkcfg (Results 1 – 3 of 3) sorted by relevance

/linux-6.3-rc2/drivers/clk/pxa/
A Dclk-pxa3xx.c168 if (xclkcfg) in pxa3xx_clk_update_accr()
169 __asm__("mcr p14, 0, %0, c6, c0, 0\n" : : "r"(xclkcfg)); in pxa3xx_clk_update_accr()
315 unsigned long xclkcfg; in clk_pxa3xx_core_get_parent() local
322 __asm__ __volatile__("mrc\tp14, 0, %0, c6, c0, 0" : "=r"(xclkcfg)); in clk_pxa3xx_core_get_parent()
323 t = xclkcfg & 0x1; in clk_pxa3xx_core_get_parent()
337 unsigned int t, xclkcfg; in clk_pxa3xx_run_get_rate() local
340 __asm__ __volatile__("mrc\tp14, 0, %0, c6, c0, 0" : "=r"(xclkcfg)); in clk_pxa3xx_run_get_rate()
341 t = xclkcfg & 0x1; in clk_pxa3xx_run_get_rate()
354 unsigned int t, xclkcfg; in clk_pxa3xx_cpll_get_rate() local
357 __asm__ __volatile__("mrc\tp14, 0, %0, c6, c0, 0" : "=r"(xclkcfg)); in clk_pxa3xx_cpll_get_rate()
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/linux-6.3-rc2/include/linux/clk/
A Dpxa.h12 extern void pxa3xx_clk_update_accr(u32 disable, u32 enable, u32 xclkcfg, u32 mask);
15 #define pxa3xx_clk_update_accr(disable, enable, xclkcfg, mask) do { } while (0) argument
/linux-6.3-rc2/drivers/cpufreq/
A Dpxa3xx-cpufreq.c135 u32 mask, disable, enable, xclkcfg; in __update_core_freq() local
142 xclkcfg = (info->core_xn == 2) ? 0x3 : 0x2; /* turbo bit */ in __update_core_freq()
144 pxa3xx_clk_update_accr(disable, enable, xclkcfg, mask); in __update_core_freq()

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