Searched refs:AON_SYSCTL_O_RESETCTL (Results 1 – 5 of 5) sorted by relevance
390 HWREGBITW( AON_SYSCTL_BASE + AON_SYSCTL_O_RESETCTL, AON_SYSCTL_RESETCTL_SYSRESET_BITN ) = 1; in SysCtrlSystemReset()420 HWREGBITW(AON_SYSCTL_BASE + AON_SYSCTL_O_RESETCTL, AON_SYSCTL_RESETCTL_CLK_LOSS_EN_BITN) = 1; in SysCtrlClockLossResetEnable()442 HWREGBITW(AON_SYSCTL_BASE + AON_SYSCTL_O_RESETCTL, AON_SYSCTL_RESETCTL_CLK_LOSS_EN_BITN) = 0; in SysCtrlClockLossResetDisable()
312 if ((( HWREG( AON_SYSCTL_BASE + AON_SYSCTL_O_RESETCTL ) & in trimDevice()316 ui32AonSysResetctl = ( HWREG( AON_SYSCTL_BASE + AON_SYSCTL_O_RESETCTL ) & in trimDevice()319 …HWREG( AON_SYSCTL_BASE + AON_SYSCTL_O_RESETCTL ) = ui32AonSysResetctl | AON_SYSCTL_RESETCTL_BOOT_D… in trimDevice()320 HWREG( AON_SYSCTL_BASE + AON_SYSCTL_O_RESETCTL ) = ui32AonSysResetctl; in trimDevice()1268 … HWREGBITW( AON_SYSCTL_BASE + AON_SYSCTL_O_RESETCTL, AON_SYSCTL_RESETCTL_VDDR_LOSS_EN_BITN ) = 0; in SetVddrLevel()1289 … HWREGBITW( AON_SYSCTL_BASE + AON_SYSCTL_O_RESETCTL, AON_SYSCTL_RESETCTL_VDDR_LOSS_EN_BITN ) = 1; in SetVddrLevel()
263 return (( HWREG( AON_SYSCTL_BASE + AON_SYSCTL_O_RESETCTL ) & in PowerCtrlResetSourceGet()
669 if ( HWREG( AON_SYSCTL_BASE + AON_SYSCTL_O_RESETCTL ) & AON_SYSCTL_RESETCTL_WU_FROM_SD_M ) { in SysCtrlResetSourceGet()672 return (( HWREG( AON_SYSCTL_BASE + AON_SYSCTL_O_RESETCTL ) & in SysCtrlResetSourceGet()
50 #define AON_SYSCTL_O_RESETCTL 0x00000004 macro
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