Searched refs:AUX_ANAIF_BASE (Results 1 – 3 of 3) sorted by relevance
102 HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = 0; in AUXADCDisable()125 …HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = AUX_ANAIF_ADCCTL_START_SRC_NO_EVENT0 | AUX_ANAIF_ADCC… in AUXADCEnableAsync()129 …HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = AUX_ANAIF_ADCCTL_START_SRC_MCU_EV | AUX_ANAIF_ADCCTL_… in AUXADCEnableAsync()163 …HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = AUX_ANAIF_ADCCTL_START_SRC_NO_EVENT0 | AUX_ANAIF_ADCC… in AUXADCEnableSync()167 …HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = AUX_ANAIF_ADCCTL_START_SRC_MCU_EV | AUX_ANAIF_ADCCTL_… in AUXADCEnableSync()196 HWREGBITW(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL, 1) = 1; // CMD: EN(1) -> FLUSH(3) in AUXADCFlushFifo()197 HWREGBITW(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL, 1) = 0; // CMD: FLUSH(3) -> EN(1) in AUXADCFlushFifo()209 while (HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCFIFOSTAT) & AUX_ANAIF_ADCFIFOSTAT_EMPTY_M); in AUXADCReadFifo()212 return HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCFIFO); in AUXADCReadFifo()225 return HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCFIFO); in AUXADCPopFifo()
304 HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCTRIG) = 0; in AUXADCGenManualTrigger()326 return HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCFIFOSTAT); in AUXADCGetFifoStatus()
90 #define AUX_ANAIF_BASE 0x400C9000 // AUX_ANAIF macro
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