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Searched refs:CTRL (Results 1 – 25 of 51) sorted by relevance

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/lk-master/external/platform/lpc15xx/lpcopen/lpc_chip_15xx/inc/
A Ddac_15xx.h49 __IO uint32_t CTRL; /*!< DAC control register */ member
106 return (pDAC->CTRL & DAC_INT_DMA_FLAG) != 0; in Chip_DAC_GetIntStatus()
126 pDAC->CTRL = (pDAC->CTRL & ~DAC_CTRL_UNUSED) | DAC_TRIG_SRC_BIT; in Chip_DAC_SetTrgSrcExternal()
139 pDAC->CTRL = (pDAC->CTRL & ~DAC_CTRL_UNUSED) | DAC_POLARITY; in Chip_DAC_SetExtTriggerPolarity()
142 pDAC->CTRL &= ~(DAC_CTRL_UNUSED | DAC_POLARITY ); in Chip_DAC_SetExtTriggerPolarity()
153 pDAC->CTRL = (pDAC->CTRL & ~DAC_CTRL_UNUSED) | DAC_SYNC_BYPASS; in Chip_DAC_EnableSyncBypass()
173 pDAC->CTRL = (pDAC->CTRL & ~DAC_CTRL_UNUSED) | DAC_TIM_ENA_BIT; in Chip_DAC_EnableIntTimer()
193 pDAC->CTRL = (pDAC->CTRL & ~DAC_CTRL_UNUSED) | DAC_DBLBUF_ENA; in Chip_DAC_EnableDoubleBuffer()
213 pDAC->CTRL = (pDAC->CTRL & ~DAC_CTRL_UNUSED) | DAC_SHUTOFF_ENA; in Chip_DAC_EnableShutOff()
233 return (pDAC->CTRL & DAC_SHUTOFF_FLAG) != 0; in Chip_DAC_GetShutOffStatus()
[all …]
A Dgpiogroup_15xx.h48 __IO uint32_t CTRL; /*!< GPIO grouped interrupt control register */ member
93 temp = pGPIOGPINT[group].CTRL; in Chip_GPIOGP_ClearIntStatus()
94 pGPIOGPINT[group].CTRL = temp | GPIOGR_INT; in Chip_GPIOGP_ClearIntStatus()
105 return (bool) ((pGPIOGPINT[group].CTRL & GPIOGR_INT) != 0); in Chip_GPIOGP_GetIntStatus()
116 pGPIOGPINT[group].CTRL &= ~GPIOGR_COMB; in Chip_GPIOGP_SelectOrMode()
127 pGPIOGPINT[group].CTRL |= GPIOGR_COMB; in Chip_GPIOGP_SelectAndMode()
138 pGPIOGPINT[group].CTRL &= ~GPIOGR_TRIG; in Chip_GPIOGP_SelectEdgeMode()
149 pGPIOGPINT[group].CTRL |= GPIOGR_TRIG; in Chip_GPIOGP_SelectLevelMode()
A Dmrt_15xx.h56 __IO uint32_t CTRL; /*!< Timer control register */ member
183 return (bool) ((pMRT->CTRL & MRT_CTRL_INTEN_MASK) != 0); in Chip_MRT_GetEnabled()
193 pMRT->CTRL |= MRT_CTRL_INTEN_MASK; in Chip_MRT_SetEnabled()
203 pMRT->CTRL &= ~MRT_CTRL_INTEN_MASK; in Chip_MRT_SetDisabled()
213 return (MRT_MODE_T) (pMRT->CTRL & MRT_CTRL_MODE_MASK); in Chip_MRT_GetMode()
226 reg = pMRT->CTRL & ~MRT_CTRL_MODE_MASK; in Chip_MRT_SetMode()
227 pMRT->CTRL = reg | (uint32_t) mode; in Chip_MRT_SetMode()
237 return ((pMRT->CTRL & MRT_CTRL_MODE_MASK) != 0) ? false : true; in Chip_MRT_IsRepeatMode()
247 return ((pMRT->CTRL & MRT_CTRL_MODE_MASK) != 0) ? true : false; in Chip_MRT_IsOneShotMode()
A Drtc_15xx.h48 __IO uint32_t CTRL; /*!< RTC control register */ member
96 pRTC->CTRL |= flags; in Chip_RTC_EnableOptions()
111 pRTC->CTRL &= ~flags; in Chip_RTC_DisableOptions()
216 return pRTC->CTRL; in Chip_RTC_ClearStatus()
229 return pRTC->CTRL; in Chip_RTC_GetStatus()
A Dacmp_15xx.h56 __IO uint32_t CTRL; /*!< Comparator block control register */ member
449 pACMP->CTRL |= ACMP_ROSCCTL_BIT; in Chip_ACMP_SetRingOscCtl()
459 pACMP->CTRL &= ~ACMP_ROSCCTL_BIT; in Chip_ACMP_ClearRingOscCtl()
469 pACMP->CTRL &= ~ACMP_EXTRESET_BIT; in Chip_ACMP_SetROscResetSrcInternal()
479 pACMP->CTRL |= ACMP_EXTRESET_BIT; in Chip_ACMP_SetROscResetSrcExternal()
A Dadc_15xx.h55 …__IO uint32_t CTRL; /*!< A/D Control Register. The AD0CR register must be written to select … member
241 temp = pADC->CTRL & ~(ADC_CR_CLKDIV_MASK); in Chip_ADC_SetDivider()
242 pADC->CTRL = temp | (uint32_t) div; in Chip_ADC_SetDivider()
266 return pADC->CTRL & ADC_CR_CLKDIV_MASK; in Chip_ADC_GetDivider()
287 return (bool) ((pADC->CTRL & ADC_CR_CALMODEBIT) == 0); in Chip_ADC_IsCalibrationDone()
A Duart_15xx.h51 __IO uint32_t CTRL; /*!< Control register */ member
149 pUART->CTRL &= ~UART_CTRL_TXDIS; in Chip_UART_TXEnable()
159 pUART->CTRL |= UART_CTRL_TXDIS; in Chip_UART_TXDisable()
A Dritimer_15xx.h50 __IO uint32_t CTRL; /*!< Control register */ member
173 return (bool) ((pRITimer->CTRL & RIT_CTRL_INT) != 0); in Chip_RIT_GetIntStatus()
/lk-master/external/platform/stm32f0xx/STM32F0xx_HAL_Driver/inc/
A Dstm32f0xx_ll_cortex.h113 return ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) == (SysTick_CTRL_COUNTFLAG_Msk)); in LL_SYSTICK_IsActiveCounterFlag()
128 SET_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK); in LL_SYSTICK_SetClkSource()
132 CLEAR_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK); in LL_SYSTICK_SetClkSource()
145 return READ_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK); in LL_SYSTICK_GetClkSource()
155 SET_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk); in LL_SYSTICK_EnableIT()
165 CLEAR_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk); in LL_SYSTICK_DisableIT()
175 return (READ_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk) == (SysTick_CTRL_TICKINT_Msk)); in LL_SYSTICK_IsEnabledIT()
/lk-master/external/platform/lpc15xx/lpcopen/lpc_chip_15xx/src/
A Dritimer_15xx.c55 pRITimer->CTRL = 0x04; in Chip_RIT_Init()
61 pRITimer->CTRL = 0x00; in Chip_RIT_DeInit()
70 reg = pRITimer->CTRL & 0xF; in Chip_RIT_SetCTRL()
71 pRITimer->CTRL = reg | val; in Chip_RIT_SetCTRL()
79 reg = pRITimer->CTRL & 0xF; in Chip_RIT_ClearCTRL()
80 pRITimer->CTRL = reg & ~val; in Chip_RIT_ClearCTRL()
A Dadc_15xx.c117 pADC->CTRL = flags; in Chip_ADC_Init()
124 pADC->CTRL = 0; in Chip_ADC_DeInit()
157 pADC->CTRL |= ADC_CR_CALMODEBIT; in Chip_ADC_StartCalibration()
160 pADC->CTRL &= ~ADC_CR_ASYNMODE; in Chip_ADC_StartCalibration()
166 pADC->CTRL &= ~ADC_CR_LPWRMODEBIT; in Chip_ADC_StartCalibration()
/lk-master/external/platform/nrfx/soc/
A Dnrfx_coredep.h115 uint32_t dwt_ctrl = DWT->CTRL; in nrfx_coredep_delay_us()
116 DWT->CTRL = dwt_ctrl | DWT_CTRL_CYCCNTENA_Msk; in nrfx_coredep_delay_us()
126 DWT->CTRL = dwt_ctrl; in nrfx_coredep_delay_us()
/lk-master/external/arch/arm/arm-m/CMSIS/Include/
A Dpmu_armv8.h200 PMU->CTRL |= PMU_CTRL_ENABLE_Msk; in ARM_PMU_Enable()
208 PMU->CTRL &= ~PMU_CTRL_ENABLE_Msk; in ARM_PMU_Disable()
226 PMU->CTRL |= PMU_CTRL_CYCCNT_RESET_Msk; in ARM_PMU_CYCCNT_Reset()
234 PMU->CTRL |= PMU_CTRL_EVENTCNT_RESET_Msk; in ARM_PMU_EVCNTR_ALL_Reset()
A Dmpu_armv8.h133 MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; in ARM_MPU_Enable()
149 MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk; in ARM_MPU_Disable()
161 MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; in ARM_MPU_Enable_NS()
177 MPU_NS->CTRL &= ~MPU_CTRL_ENABLE_Msk; in ARM_MPU_Disable_NS()
/lk-master/external/arch/arm/arm-m/CMSIS/Patch/
A Dsystick_nvic.patch55 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
68 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
81 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
94 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
107 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
120 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
133 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
146 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
159 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
172 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
[all …]
/lk-master/external/platform/stm32f0xx/STM32F0xx_HAL_Driver/
A Dstm32f0xx_hal_cortex.c312 SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK; in HAL_SYSTICK_CLKSourceConfig()
316 SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK; in HAL_SYSTICK_CLKSourceConfig()
A Dstm32f0xx_hal.c341 CLEAR_BIT(SysTick->CTRL,SysTick_CTRL_TICKINT_Msk); in HAL_SuspendTick()
357 SET_BIT(SysTick->CTRL,SysTick_CTRL_TICKINT_Msk); in HAL_ResumeTick()
/lk-master/external/platform/nrfx/hal/
A Dnrf_systick.h139 return SysTick->CTRL; in nrf_systick_csr_get()
144 SysTick->CTRL = val; in nrf_systick_csr_set()
/lk-master/external/platform/stm32f7xx/STM32F7xx_HAL_Driver/Inc/
A Dstm32f7xx_hal_cortex.h283 SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK; \
286 SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK; \
446 MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk; in HAL_MPU_Disable()
463 MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; in HAL_MPU_Enable()
/lk-master/external/platform/stm32f1xx/STM32F10x_StdPeriph_Driver/src/
A Dmisc.c203 SysTick->CTRL |= SysTick_CLKSource_HCLK; in SysTick_CLKSourceConfig()
207 SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8; in SysTick_CLKSourceConfig()
/lk-master/external/platform/stm32f2xx/STM32F2xx_StdPeriph_Driver/src/
A Dmisc.c229 SysTick->CTRL |= SysTick_CLKSource_HCLK; in SysTick_CLKSourceConfig()
233 SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8; in SysTick_CLKSourceConfig()
/lk-master/external/platform/stm32f4xx/STM32F4xx_StdPeriph_Driver/src/
A Dmisc.c229 SysTick->CTRL |= SysTick_CLKSource_HCLK; in SysTick_CLKSourceConfig()
233 SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8; in SysTick_CLKSourceConfig()
/lk-master/external/platform/stm32f7xx/STM32F7xx_HAL_Driver/Src/
A Dstm32f7xx_hal.c341 SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk;
357 SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk;
A Dstm32f7xx_hal_cortex.c434 SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK; in HAL_SYSTICK_CLKSourceConfig()
436 SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK; in HAL_SYSTICK_CLKSourceConfig()
/lk-master/arch/arm/arm-m/systick/
A Dsystick.c46 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; in arm_cm_systick_set_periodic()
50 SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; in arm_cm_systick_cancel_periodic()

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