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Searched refs:DDR_CLK_CTRL_DDR_3XCLK_DIV (Results 1 – 3 of 3) sorted by relevance

/lk-master/target/uzed/
A Dtarget.c146 DDR_CLK_CTRL_DDR_3XCLK_DIV(2) | DDR_CLK_CTRL_DDR_2XCLK_DIV(3),
/lk-master/target/zybo/
A Dtarget.c150 DDR_CLK_CTRL_DDR_3XCLK_DIV(2) | DDR_CLK_CTRL_DDR_2XCLK_DIV(3),
/lk-master/platform/zynq/include/platform/
A Dzynq.h390 #define DDR_CLK_CTRL_DDR_3XCLK_DIV(x) ((x & BIT_MASK(6)) << 20) macro

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