Home
last modified time | relevance | path

Searched refs:DDR_PLL_CFG (Results 1 – 2 of 2) sorted by relevance

/lk-master/platform/zynq/
A Dplatform.c80 SLCR_REG(DDR_PLL_CFG) = PLL_CFG_LOCK_CNT(cfg->ddr.lock_cnt) | PLL_CFG_PLL_CP(cfg->ddr.cp) | in zynq_pll_init()
/lk-master/platform/zynq/include/platform/
A Dzynq.h170 uint32_t DDR_PLL_CFG; // DDR PLL Configuration member

Completed in 6 milliseconds