Home
last modified time | relevance | path

Searched refs:IsCacheable (Results 1 – 4 of 4) sorted by relevance

/lk-master/external/arch/arm/arm-m/CMSIS/Include/
A Dmpu_armv7.h88 #define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable) \ argument
91 (((IsCacheable) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk) | \
123 #define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBuffe… argument
124 …ableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable),…
/lk-master/platform/stm32f7xx/
A Dinit.c174 MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE; in mpu_init()
210 MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE; in mpu_init()
226 MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE; in mpu_init()
/lk-master/external/platform/stm32f7xx/STM32F7xx_HAL_Driver/Src/
A Dstm32f7xx_hal_cortex.c293 assert_param(IS_MPU_ACCESS_CACHEABLE(MPU_Init->IsCacheable)); in HAL_MPU_ConfigRegion()
303 ((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) | in HAL_MPU_ConfigRegion()
/lk-master/external/platform/stm32f7xx/STM32F7xx_HAL_Driver/Inc/
A Dstm32f7xx_hal_cortex.h84 …uint8_t IsCacheable; /*!< Specifies the cacheable status of the region pr… member

Completed in 9 milliseconds