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/lk-master/external/platform/stm32f1xx/STM32F10x_StdPeriph_Driver/inc/
A Dstm32f10x_pwr.h65 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_2V2) || ((LEVEL) == PWR_PVDLevel_2V3)|| \ argument
66 ((LEVEL) == PWR_PVDLevel_2V4) || ((LEVEL) == PWR_PVDLevel_2V5)|| \
67 ((LEVEL) == PWR_PVDLevel_2V6) || ((LEVEL) == PWR_PVDLevel_2V7)|| \
68 ((LEVEL) == PWR_PVDLevel_2V8) || ((LEVEL) == PWR_PVDLevel_2V9))
A Dstm32f10x_bkp.h59 #define IS_BKP_TAMPER_PIN_LEVEL(LEVEL) (((LEVEL) == BKP_TamperPinLevel_High) || \ argument
60 ((LEVEL) == BKP_TamperPinLevel_Low))
A Dstm32f10x_tim.h492 #define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLevel_OFF) || \ argument
493 ((LEVEL) == TIM_LOCKLevel_1) || \
494 ((LEVEL) == TIM_LOCKLevel_2) || \
495 ((LEVEL) == TIM_LOCKLevel_3))
/lk-master/external/platform/stm32f2xx/STM32F2xx_StdPeriph_Driver/inc/
A Dstm32f2xx_pwr.h68 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_0) || ((LEVEL) == PWR_PVDLevel_1)|| \ argument
69 ((LEVEL) == PWR_PVDLevel_2) || ((LEVEL) == PWR_PVDLevel_3)|| \
70 ((LEVEL) == PWR_PVDLevel_4) || ((LEVEL) == PWR_PVDLevel_5)|| \
71 ((LEVEL) == PWR_PVDLevel_6) || ((LEVEL) == PWR_PVDLevel_7))
A Dstm32f2xx_flash.h166 #define IS_OB_RDP(LEVEL) (((LEVEL) == OB_RDP_Level_0)||\ argument
167 ((LEVEL) == OB_RDP_Level_1))/*||\
211 #define IS_OB_BOR(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) || ((LEVEL) == OB_BOR_LEVEL2) ||\ argument
212 ((LEVEL) == OB_BOR_LEVEL3) || ((LEVEL) == OB_BOR_OFF))
A Dstm32f2xx_tim.h447 #define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLevel_OFF) || \ argument
448 ((LEVEL) == TIM_LOCKLevel_1) || \
449 ((LEVEL) == TIM_LOCKLevel_2) || \
450 ((LEVEL) == TIM_LOCKLevel_3))
/lk-master/external/platform/stm32f4xx/STM32F4xx_StdPeriph_Driver/inc/
A Dstm32f4xx_pwr.h67 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_0) || ((LEVEL) == PWR_PVDLevel_1)|| \ argument
68 ((LEVEL) == PWR_PVDLevel_2) || ((LEVEL) == PWR_PVDLevel_3)|| \
69 ((LEVEL) == PWR_PVDLevel_4) || ((LEVEL) == PWR_PVDLevel_5)|| \
70 ((LEVEL) == PWR_PVDLevel_6) || ((LEVEL) == PWR_PVDLevel_7))
A Dstm32f4xx_flash.h278 #define IS_OB_RDP(LEVEL) (((LEVEL) == OB_RDP_Level_0)||\ argument
279 ((LEVEL) == OB_RDP_Level_1))/*||\
323 #define IS_OB_BOR(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) || ((LEVEL) == OB_BOR_LEVEL2) ||\ argument
324 ((LEVEL) == OB_BOR_LEVEL3) || ((LEVEL) == OB_BOR_OFF))
A Dstm32f4xx_tim.h447 #define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLevel_OFF) || \ argument
448 ((LEVEL) == TIM_LOCKLevel_1) || \
449 ((LEVEL) == TIM_LOCKLevel_2) || \
450 ((LEVEL) == TIM_LOCKLevel_3))
/lk-master/external/platform/stm32f7xx/STM32F7xx_HAL_Driver/Inc/
A Dstm32f7xx_hal_pwr.h384 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ argument
385 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
386 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
387 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
A Dstm32f7xx_hal_flash_ex.h388 #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\ argument
389 ((LEVEL) == OB_RDP_LEVEL_1) ||\
390 ((LEVEL) == OB_RDP_LEVEL_2))
404 #define IS_OB_BOR_LEVEL(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) || ((LEVEL) == OB_BOR_LEVEL2) ||\ argument
405 ((LEVEL) == OB_BOR_LEVEL3) || ((LEVEL) == OB_BOR_OFF))
/lk-master/external/platform/stm32f0xx/STM32F0xx_HAL_Driver/inc/
A Dstm32f0xx_hal_pwr_ex.h195 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ argument
196 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
197 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
198 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
A Dstm32f0xx_hal_flash_ex.h68 #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\ argument
69 ((LEVEL) == OB_RDP_LEVEL_1))/*||\
A Dstm32f0xx_hal_tim.h992 #define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLEVEL_OFF) || \ argument
993 ((LEVEL) == TIM_LOCKLEVEL_1) || \
994 ((LEVEL) == TIM_LOCKLEVEL_2) || \
995 ((LEVEL) == TIM_LOCKLEVEL_3))

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