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Searched refs:MODIFY_REG (Results 1 – 25 of 70) sorted by relevance

123

/lk-master/external/platform/stm32f0xx/STM32F0xx_HAL_Driver/
A Dstm32f0xx_ll_tim.c756 MODIFY_REG(tmpccmr1, TIM_CCMR1_OC1M, TIM_OCInitStruct->OCMode); in OC1Config()
762 MODIFY_REG(tmpccer, TIM_CCER_CC1E, TIM_OCInitStruct->OCState); in OC1Config()
914 MODIFY_REG(tmpccmr2, TIM_CCMR2_OC3M, TIM_OCInitStruct->OCMode); in OC3Config()
1047 MODIFY_REG(TIMx->CCMR1, in IC1Config()
1052 MODIFY_REG(TIMx->CCER, in IC1Config()
1080 MODIFY_REG(TIMx->CCMR1, in IC2Config()
1085 MODIFY_REG(TIMx->CCER, in IC2Config()
1113 MODIFY_REG(TIMx->CCMR2, in IC3Config()
1118 MODIFY_REG(TIMx->CCER, in IC3Config()
1146 MODIFY_REG(TIMx->CCMR2, in IC4Config()
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A Dstm32f0xx_hal_crc_ex.c110 MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, CRC_POLYLENGTH_32B); in HAL_CRCEx_Init()
145 MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_IN, InputReverseMode); in HAL_CRCEx_Input_Data_Reverse()
171 MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_OUT, OutputReverseMode); in HAL_CRCEx_Output_Data_Reverse()
244 MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, PolyLength); in HAL_CRCEx_Polynomial_Set()
A Dstm32f0xx_hal_uart_ex.c232 MODIFY_REG(huart->Instance->CR3, USART_CR3_DEP, Polarity); in HAL_RS485Ex_Init()
237 MODIFY_REG(huart->Instance->CR1, (USART_CR1_DEDT|USART_CR1_DEAT), temp); in HAL_RS485Ex_Init()
316 MODIFY_REG(huart->Instance->CR2, USART_CR2_LBDL, BreakDetectLength); in HAL_LIN_Init()
421 MODIFY_REG(huart->Instance->CR3, USART_CR3_WUS, WakeUpSelection.WakeUpEvent); in HAL_UARTEx_StopModeWakeUpSourceConfig()
536 MODIFY_REG(huart->Instance->CR2, USART_CR2_ADDM7, AddressLength); in HAL_MultiProcessorEx_AddressLength_Set()
600 MODIFY_REG(huart->Instance->CR2, USART_CR2_ADDM7, WakeUpSelection.AddressLength); in UARTEx_Wakeup_AddressConfig()
603 …MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)WakeUpSelection.Address << UART_CR2_ADD… in UARTEx_Wakeup_AddressConfig()
A Dstm32f0xx_hal_smartcard_ex.c109 …MODIFY_REG(hsmartcard->Instance->RTOR, USART_RTOR_BLEN, ((uint32_t)BlockLength << SMARTCARD_RTOR_B… in HAL_SMARTCARDEx_BlockLength_Config()
123 MODIFY_REG(hsmartcard->Instance->RTOR, USART_RTOR_RTO, TimeOutValue); in HAL_SMARTCARDEx_TimeOut_Config()
/lk-master/external/platform/stm32f0xx/STM32F0xx_HAL_Driver/inc/
A Dstm32f0xx_ll_rtc.h738 MODIFY_REG(RTCx->CR, RTC_CR_FMT, HourFormat); in LL_RTC_SetHourFormat()
928 MODIFY_REG(RTCx->CR, RTC_CR_POL, Polarity); in LL_RTC_SetOutputPolarity()
1094 MODIFY_REG(RTCx->TR, RTC_TR_PM, TimeFormat); in LL_RTC_TIME_SetFormat()
1127 MODIFY_REG(RTCx->TR, (RTC_TR_HT | RTC_TR_HU), in LL_RTC_TIME_SetHour()
1203 MODIFY_REG(RTCx->TR, (RTC_TR_ST | RTC_TR_SU), in LL_RTC_TIME_SetSecond()
1402 MODIFY_REG(RTCx->DR, (RTC_DR_YT | RTC_DR_YU), in LL_RTC_DATE_SetYear()
1486 MODIFY_REG(RTCx->DR, (RTC_DR_MT | RTC_DR_MU), in LL_RTC_DATE_SetMonth()
1531 MODIFY_REG(RTCx->DR, (RTC_DR_DT | RTC_DR_DU), in LL_RTC_DATE_SetDay()
2050 MODIFY_REG(RTCx->CR, RTC_CR_TSEDGE, Edge); in LL_RTC_TS_SetActiveEdge()
2552 MODIFY_REG(RTCx->WUTR, RTC_WUTR_WUT, Value); in LL_RTC_WAKEUP_SetAutoReload()
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A Dstm32f0xx_ll_comp.h363 MODIFY_REG(COMPxy_COMMON->CSR, COMP_CSR_WNDWEN, WindowMode); in LL_COMP_SetCommonWindowMode()
403 MODIFY_REG(COMP->CSR, in LL_COMP_SetPowerMode()
464 MODIFY_REG(COMP->CSR, in LL_COMP_ConfigInputs()
489 MODIFY_REG(COMP->CSR, in LL_COMP_SetInputPlus()
537 MODIFY_REG(COMP->CSR, in LL_COMP_SetInputMinus()
580 MODIFY_REG(COMP->CSR, in LL_COMP_SetInputHysteresis()
636 MODIFY_REG(COMP->CSR, in LL_COMP_SetOutputSelection()
681 MODIFY_REG(COMP->CSR, in LL_COMP_SetOutputPolarity()
A Dstm32f0xx_ll_crs.h302 MODIFY_REG(CRS->CR, CRS_CR_TRIM, Value << CRS_CR_TRIM_Pos); in LL_CRS_SetHSI48SmoothTrimming()
325 MODIFY_REG(CRS->CFGR, CRS_CFGR_RELOAD, Value); in LL_CRS_SetReloadCounter()
347 MODIFY_REG(CRS->CFGR, CRS_CFGR_FELIM, Value << CRS_CFGR_FELIM_Pos); in LL_CRS_SetFreqErrorLimit()
376 MODIFY_REG(CRS->CFGR, CRS_CFGR_SYNCDIV, Divider); in LL_CRS_SetSyncDivider()
408 MODIFY_REG(CRS->CFGR, CRS_CFGR_SYNCSRC, Source); in LL_CRS_SetSyncSignalSource()
434 MODIFY_REG(CRS->CFGR, CRS_CFGR_SYNCPOL, Polarity); in LL_CRS_SetSyncPolarity()
469 MODIFY_REG(CRS->CR, CRS_CR_TRIM, HSI48CalibrationValue << CRS_CR_TRIM_Pos); in LL_CRS_ConfigSynchronization()
470 MODIFY_REG(CRS->CFGR, in LL_CRS_ConfigSynchronization()
A Dstm32f0xx_ll_usart.h770 MODIFY_REG(USARTx->CR1, USART_CR1_WAKE, Method); in LL_USART_SetWakeUpMethod()
801 MODIFY_REG(USARTx->CR1, USART_CR1_M, DataWidth); in LL_USART_SetDataWidth()
926 MODIFY_REG(USARTx->CR2, USART_CR2_CPHA, ClockPhase); in LL_USART_SetClockPhase()
1057 MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits); in LL_USART_SetStopBitsLength()
1110 MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits); in LL_USART_ConfigCharacter()
1124 MODIFY_REG(USARTx->CR2, USART_CR2_SWAP, SwapConfig); in LL_USART_SetTXRXSwap()
1592 MODIFY_REG(USARTx->CR3, USART_CR3_WUS, Type); in LL_USART_SetWKUPType()
1694 MODIFY_REG(USARTx->RTOR, USART_RTOR_RTO, Timeout); in LL_USART_SetRxTimeout()
1794 MODIFY_REG(USARTx->CR3, USART_CR3_IRLP, PowerMode); in LL_USART_SetIrdaPowerMode()
2089 MODIFY_REG(USARTx->CR2, USART_CR2_LBDL, LINBDLength); in LL_USART_SetLINBrkDetectionLen()
[all …]
A Dstm32f0xx_ll_rcc.h811 MODIFY_REG(RCC->CR, RCC_CR_HSITRIM, Value << RCC_CR_HSITRIM_Pos); in LL_RCC_HSI_SetCalibTrimming()
1030 MODIFY_REG(RCC->BDCR, RCC_BDCR_LSEDRV, LSEDrive); in LL_RCC_LSE_SetDriveCapability()
1117 MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, Source); in LL_RCC_SetSysClkSource()
1153 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, Prescaler); in LL_RCC_SetAHBPrescaler()
1169 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, Prescaler); in LL_RCC_SetAPB1Prescaler()
1254 MODIFY_REG(RCC->CFGR, RCC_CFGR_MCOSEL, MCOxSource); in LL_RCC_ConfigMCO()
1303 MODIFY_REG(RCC->CFGR3, RCC_CFGR3_I2C1SW, I2CxSource); in LL_RCC_SetI2CClockSource()
1317 MODIFY_REG(RCC->CFGR3, RCC_CFGR3_CECSW, CECxSource); in LL_RCC_SetCECClockSource()
1335 MODIFY_REG(RCC->CFGR3, RCC_CFGR3_USBSW, USBxSource); in LL_RCC_SetUSBClockSource()
1442 MODIFY_REG(RCC->BDCR, RCC_BDCR_RTCSEL, Source); in LL_RCC_SetRTCClockSource()
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A Dstm32f0xx_ll_spi.h416 MODIFY_REG(SPIx->CR1, SPI_CR1_MSTR | SPI_CR1_SSI, Mode); in LL_SPI_SetMode()
445 MODIFY_REG(SPIx->CR2, SPI_CR2_FRF, Standard); in LL_SPI_SetStandard()
474 MODIFY_REG(SPIx->CR1, SPI_CR1_CPHA, ClockPhase); in LL_SPI_SetClockPhase()
503 MODIFY_REG(SPIx->CR1, SPI_CR1_CPOL, ClockPolarity); in LL_SPI_SetClockPolarity()
537 MODIFY_REG(SPIx->CR1, SPI_CR1_BR, BaudRate); in LL_SPI_SetBaudRatePrescaler()
571 MODIFY_REG(SPIx->CR1, SPI_CR1_LSBFIRST, BitOrder); in LL_SPI_SetTransferBitOrder()
646 MODIFY_REG(SPIx->CR2, SPI_CR2_DS, DataWidth); in LL_SPI_SetDataWidth()
684 MODIFY_REG(SPIx->CR2, SPI_CR2_FRXTH, Threshold); in LL_SPI_SetRxFIFOThreshold()
756 MODIFY_REG(SPIx->CR1, SPI_CR1_CRCL, CRCLength); in LL_SPI_SetCRCWidth()
851 MODIFY_REG(SPIx->CR1, SPI_CR1_SSM, NSS); in LL_SPI_SetNSSMode()
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A Dstm32f0xx_ll_adc.h1578 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_RES, Resolution); in LL_ADC_SetResolution()
1780 MODIFY_REG(ADCx->SMPR, ADC_SMPR_SMP, SamplingTime); in LL_ADC_SetSamplingTimeCommonChannels()
2480 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_OVRMOD, Overrun); in LL_ADC_REG_SetOverrun()
2561 MODIFY_REG(ADCx->CFGR1, in LL_ADC_SetAnalogWDMonitChannels()
2659 MODIFY_REG(ADCx->TR, in LL_ADC_ConfigAnalogWDThresholds()
2698 MODIFY_REG(ADCx->TR, in LL_ADC_SetAnalogWDThresholds()
2768 MODIFY_REG(ADCx->CR, in LL_ADC_Enable()
2788 MODIFY_REG(ADCx->CR, in LL_ADC_Disable()
2848 MODIFY_REG(ADCx->CR, in LL_ADC_StartCalibration()
2895 MODIFY_REG(ADCx->CR, in LL_ADC_REG_StartConversion()
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A Dstm32f0xx_ll_dac.h554 MODIFY_REG(DACx->CR, in LL_DAC_SetTriggerSource()
612 MODIFY_REG(DACx->CR, in LL_DAC_SetWaveAutoGeneration()
675 MODIFY_REG(DACx->CR, in LL_DAC_SetWaveNoiseLFSR()
747 MODIFY_REG(DACx->CR, in LL_DAC_SetWaveTriangleAmplitude()
804 MODIFY_REG(DACx->CR, in LL_DAC_SetOutputBuffer()
1127 MODIFY_REG(*preg, in LL_DAC_ConvertData12RightAligned()
1152 MODIFY_REG(*preg, in LL_DAC_ConvertData12LeftAligned()
1177 MODIFY_REG(*preg, in LL_DAC_ConvertData8RightAligned()
1196 MODIFY_REG(DACx->DHR12RD, in LL_DAC_ConvertDualData12RightAligned()
1217 MODIFY_REG(DACx->DHR12LD, in LL_DAC_ConvertDualData12LeftAligned()
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A Dstm32f0xx_ll_wwdg.h174 MODIFY_REG(WWDGx->CR, WWDG_CR_T, Counter); in LL_WWDG_SetCounter()
203 MODIFY_REG(WWDGx->CFR, WWDG_CFR_WDGTB, Prescaler); in LL_WWDG_SetPrescaler()
239 MODIFY_REG(WWDGx->CFR, WWDG_CFR_W, Window); in LL_WWDG_SetWindow()
A Dstm32f0xx_ll_tim.h1123 MODIFY_REG(TIMx->CR1, TIM_CR1_URS, UpdateSource); in LL_TIM_SetUpdateSource()
1150 MODIFY_REG(TIMx->CR1, TIM_CR1_OPM, OnePulseMode); in LL_TIM_SetOnePulseMode()
1255 MODIFY_REG(TIMx->CR1, TIM_CR1_CKD, ClockDivision); in LL_TIM_SetClockDivision()
1447 MODIFY_REG(TIMx->CR2, TIM_CR2_CCUS, CCUpdateSource); in LL_TIM_CC_SetUpdate()
1461 MODIFY_REG(TIMx->CR2, TIM_CR2_CCDS, DMAReqTrigger); in LL_TIM_CC_SetDMAReqTrigger()
1493 MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel); in LL_TIM_CC_SetLockLevel()
2008 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
2615 MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, EncoderMode); in LL_TIM_SetEncoderMode()
2662 MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, SlaveMode); in LL_TIM_SetSlaveMode()
2684 MODIFY_REG(TIMx->SMCR, TIM_SMCR_TS, TriggerInput); in LL_TIM_SetTriggerInput()
[all …]
A Dstm32f0xx_ll_gpio.h286 MODIFY_REG(GPIOx->MODER, ((Pin * Pin) * GPIO_MODER_MODER0), ((Pin * Pin) * Mode)); in LL_GPIO_SetPinMode()
354 MODIFY_REG(GPIOx->OTYPER, PinMask, (PinMask * OutputType)); in LL_GPIO_SetPinOutputType()
424 MODIFY_REG(GPIOx->OSPEEDR, ((Pin * Pin) * GPIO_OSPEEDR_OSPEEDR0), ((Pin * Pin) * Speed)); in LL_GPIO_SetPinSpeed()
492 MODIFY_REG(GPIOx->PUPDR, ((Pin * Pin) * GPIO_PUPDR_PUPDR0), ((Pin * Pin) * Pull)); in LL_GPIO_SetPinPull()
555 MODIFY_REG(GPIOx->AFR[0], ((((Pin * Pin) * Pin) * Pin) * GPIO_AFRL_AFSEL0), in LL_GPIO_SetAFPin_0_7()
616 …MODIFY_REG(GPIOx->AFR[1], (((((Pin >> 8U) * (Pin >> 8U)) * (Pin >> 8U)) * (Pin >> 8U)) * GPIO_AFRH… in LL_GPIO_SetAFPin_8_15()
A Dstm32f0xx_ll_system.h367 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, Memory); in LL_SYSCFG_SetRemapMemory()
395 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_IR_MOD, Source); in LL_SYSCFG_SetIRModEnvelopeSignal()
434 MODIFY_REG(SYSCFG->CFGR1, (Remap & 0x00FF00FFU) << 8U, (Remap & 0xFF00FF00U)); in LL_SYSCFG_SetRemapDMA_USART()
449 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_SPI2_DMA_RMP, Remap); in LL_SYSCFG_SetRemapDMA_SPI()
464 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_I2C1_DMA_RMP, Remap); in LL_SYSCFG_SetRemapDMA_I2C()
479 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_ADC_DMA_RMP, Remap); in LL_SYSCFG_SetRemapDMA_ADC()
512 MODIFY_REG(SYSCFG->CFGR1, (Remap & 0x00FF00FFU) << 8U, (Remap & 0xFF00FF00U)); in LL_SYSCFG_SetRemapDMA_TIM()
644 …MODIFY_REG(SYSCFG->EXTICR[Line & 0xFF], SYSCFG_EXTICR1_EXTI0 << (Line >> 16), Port << (Line >> 16)… in LL_SYSCFG_SetEXTISource()
1553 …MODIFY_REG(SYSCFG->CFGR2, SYSCFG_CFGR2_LOCKUP_LOCK | SYSCFG_CFGR2_SRAM_PARITY_LOCK | SYSCFG_CFGR2_… in LL_SYSCFG_SetTIMBreakInputs()
1555 MODIFY_REG(SYSCFG->CFGR2, SYSCFG_CFGR2_LOCKUP_LOCK | SYSCFG_CFGR2_SRAM_PARITY_LOCK, Break); in LL_SYSCFG_SetTIMBreakInputs()
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A Dstm32f0xx_ll_i2c.h454 …MODIFY_REG(I2Cx->CR1, I2C_CR1_ANFOFF | I2C_CR1_DNF, AnalogFilter | (DigitalFilter << I2C_CR1_DNF_P… in LL_I2C_ConfigFilters()
470 MODIFY_REG(I2Cx->CR1, I2C_CR1_DNF, DigitalFilter << I2C_CR1_DNF_Pos); in LL_I2C_SetDigitalFilter()
770 MODIFY_REG(I2Cx->CR2, I2C_CR2_ADD10, AddressingMode); in LL_I2C_SetMasterAddressingMode()
799 MODIFY_REG(I2Cx->OAR1, I2C_OAR1_OA1 | I2C_OAR1_OA1MODE, OwnAddress1 | OwnAddrSize); in LL_I2C_SetOwnAddress1()
855 MODIFY_REG(I2Cx->OAR2, I2C_OAR2_OA2 | I2C_OAR2_OA2MSK, OwnAddress2 | OwnAddrMask); in LL_I2C_SetOwnAddress2()
976 MODIFY_REG(I2Cx->CR1, I2C_CR1_SMBHEN | I2C_CR1_SMBDEN, PeripheralMode); in LL_I2C_SetMode()
1104 MODIFY_REG(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTA | I2C_TIMEOUTR_TIDLE | I2C_TIMEOUTR_TIMEOUTB, in LL_I2C_ConfigSMBusTimeout()
1929 MODIFY_REG(I2Cx->CR2, I2C_CR2_NBYTES, TransferSize << I2C_CR2_NBYTES_Pos); in LL_I2C_SetTransferSize()
1955 MODIFY_REG(I2Cx->CR2, I2C_CR2_NACK, TypeAcknowledge); in LL_I2C_AcknowledgeNextData()
2030 MODIFY_REG(I2Cx->CR2, I2C_CR2_RD_WRN, TransferRequest); in LL_I2C_SetTransferRequest()
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A Dstm32f0xx_ll_crc.h198 MODIFY_REG(CRCx->CR, CRC_CR_POLYSIZE, PolySize); in LL_CRC_SetPolynomialSize()
232 MODIFY_REG(CRCx->CR, CRC_CR_REV_IN, ReverseMode); in LL_CRC_SetInputDataReverseMode()
261 MODIFY_REG(CRCx->CR, CRC_CR_REV_OUT, ReverseMode); in LL_CRC_SetOutputDataReverseMode()
/lk-master/external/platform/stm32f7xx/STM32F7xx_HAL_Driver/Src/
A Dstm32f7xx_hal_crc_ex.c153 MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, PolyLength); in HAL_CRCEx_Polynomial_Set()
179 MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_IN, InputReverseMode); in HAL_CRCEx_Input_Data_Reverse()
205 MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_OUT, OutputReverseMode); in HAL_CRCEx_Output_Data_Reverse()
A Dstm32f7xx_hal_smartcard_ex.c105 …MODIFY_REG(hsc->Instance->RTOR, USART_RTOR_BLEN, ((uint32_t)BlockLength << SMARTCARD_RTOR_BLEN_LSB… in HAL_SMARTCARDEx_BlockLength_Config()
118 MODIFY_REG(hsc->Instance->RTOR, USART_RTOR_RTO, TimeOutValue); in HAL_SMARTCARDEx_TimeOut_Config()
A Dstm32f7xx_hal_iwdg.c211 MODIFY_REG(hiwdg->Instance->PR, (uint32_t)IWDG_PR_PR, hiwdg->Init.Prescaler); in HAL_IWDG_Init()
212 MODIFY_REG(hiwdg->Instance->RLR, (uint32_t)IWDG_RLR_RL, hiwdg->Init.Reload); in HAL_IWDG_Init()
228 MODIFY_REG(hiwdg->Instance->WINR, (uint32_t)IWDG_WINR_WIN, hiwdg->Init.Window); in HAL_IWDG_Init()
A Dstm32f7xx_hal_wwdg.c174 …MODIFY_REG(hwwdg->Instance->CFR, (WWDG_CFR_WDGTB | WWDG_CFR_W), (hwwdg->Init.Prescaler | hwwdg->In… in HAL_WWDG_Init()
176 MODIFY_REG(hwwdg->Instance->CR, WWDG_CR_T, hwwdg->Init.Counter); in HAL_WWDG_Init()
343 MODIFY_REG(hwwdg->Instance->CR, (uint32_t)WWDG_CR_T, Counter); in HAL_WWDG_Refresh()
A Dstm32f7xx_hal_smartcard.c922 MODIFY_REG(hsc->Instance->CR1, USART_CR1_FIELDS, tmpreg); in SMARTCARD_SetConfig()
931 MODIFY_REG(hsc->Instance->CR2, USART_CR2_FIELDS, tmpreg); in SMARTCARD_SetConfig()
942 MODIFY_REG(hsc->Instance-> CR3,USART_CR3_FIELDS, tmpreg); in SMARTCARD_SetConfig()
946 MODIFY_REG(hsc->Instance->GTPR, (uint32_t)(USART_GTPR_GT|USART_GTPR_PSC), tmpreg); in SMARTCARD_SetConfig()
954 MODIFY_REG(hsc->Instance->RTOR, (USART_RTOR_RTO|USART_RTOR_BLEN), tmpreg); in SMARTCARD_SetConfig()
1027 MODIFY_REG(hsc->Instance->CR2, USART_CR2_TXINV, hsc->AdvancedInit.TxPinLevelInvert); in SMARTCARD_AdvFeatureConfig()
1033 MODIFY_REG(hsc->Instance->CR2, USART_CR2_RXINV, hsc->AdvancedInit.RxPinLevelInvert); in SMARTCARD_AdvFeatureConfig()
1039 MODIFY_REG(hsc->Instance->CR2, USART_CR2_DATAINV, hsc->AdvancedInit.DataInvert); in SMARTCARD_AdvFeatureConfig()
1045 MODIFY_REG(hsc->Instance->CR2, USART_CR2_SWAP, hsc->AdvancedInit.Swap); in SMARTCARD_AdvFeatureConfig()
1051 MODIFY_REG(hsc->Instance->CR3, USART_CR3_OVRDIS, hsc->AdvancedInit.OverrunDisable); in SMARTCARD_AdvFeatureConfig()
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A Dstm32f7xx_ll_sdmmc.c236 MODIFY_REG(SDMMCx->CLKCR, CLKCR_CLEAR_MASK, tmpreg); in SDMMC_Init()
374 MODIFY_REG(SDMMCx->CMD, CMD_CLEAR_MASK, tmpreg); in SDMMC_SendCommand()
446 MODIFY_REG(SDMMCx->DCTRL, DCTRL_CLEAR_MASK, tmpreg); in SDMMC_DataConfig()
A Dstm32f7xx_hal_uart.c381 MODIFY_REG(huart->Instance->CR2, USART_CR2_LBDL, BreakDetectLength); in HAL_LIN_Init()
451 MODIFY_REG(huart->Instance->CR1, USART_CR1_WAKE, WakeUpMethod); in HAL_MultiProcessor_Init()
1567 MODIFY_REG(huart->Instance->CR1, UART_CR1_FIELDS, tmpreg); in UART_SetConfig()
1572 MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); in UART_SetConfig()
1655 MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert); in UART_AdvFeatureConfig()
1661 MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert); in UART_AdvFeatureConfig()
1667 MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert); in UART_AdvFeatureConfig()
1673 MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap); in UART_AdvFeatureConfig()
1679 MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable); in UART_AdvFeatureConfig()
1685 MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError); in UART_AdvFeatureConfig()
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