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Searched refs:NRFX_ASSERT (Results 1 – 25 of 59) sorted by relevance

123

/lk-master/external/platform/nrfx/drivers/src/
A Dnrfx_gpiote.c283 NRFX_ASSERT(p_config); in nrfx_gpiote_out_init()
339 NRFX_ASSERT(pin_in_use(pin)); in nrfx_gpiote_out_uninit()
359 NRFX_ASSERT(pin_in_use(pin)); in nrfx_gpiote_out_set()
369 NRFX_ASSERT(pin_in_use(pin)); in nrfx_gpiote_out_clear()
379 NRFX_ASSERT(pin_in_use(pin)); in nrfx_gpiote_out_toggle()
389 NRFX_ASSERT(pin_in_use(pin)); in nrfx_gpiote_out_task_enable()
399 NRFX_ASSERT(pin_in_use(pin)); in nrfx_gpiote_out_task_disable()
461 NRFX_ASSERT(pin_in_use(pin)); in nrfx_gpiote_out_task_force()
473 NRFX_ASSERT(pin_in_use(pin)); in nrfx_gpiote_out_task_trigger()
485 NRFX_ASSERT(pin_in_use(pin)); in nrfx_gpiote_set_task_trigger()
[all …]
A Dnrfx_nvmc.c348 NRFX_ASSERT(is_valid_address(addr, true)); in nrfx_nvmc_byte_writable_check()
356 NRFX_ASSERT(is_valid_address(addr, true)); in nrfx_nvmc_halfword_writable_check()
357 NRFX_ASSERT(is_halfword_aligned(addr)); in nrfx_nvmc_halfword_writable_check()
374 NRFX_ASSERT(is_valid_address(addr, true)); in nrfx_nvmc_word_writable_check()
383 NRFX_ASSERT(is_valid_address(addr, true)); in nrfx_nvmc_byte_write()
392 NRFX_ASSERT(is_valid_address(addr, true)); in nrfx_nvmc_halfword_write()
393 NRFX_ASSERT(is_halfword_aligned(addr)); in nrfx_nvmc_halfword_write()
402 NRFX_ASSERT(is_valid_address(addr, true)); in nrfx_nvmc_word_write()
414 NRFX_ASSERT(is_valid_address(addr, true)); in nrfx_nvmc_bytes_write()
478 NRFX_ASSERT(nrfx_is_word_aligned(src)); in nrfx_nvmc_words_write()
[all …]
A Dnrfx_timer.c79 NRFX_ASSERT(p_instance->p_reg != NRF_TIMER0); in nrfx_timer_init()
81 NRFX_ASSERT(p_config); in nrfx_timer_init()
82 NRFX_ASSERT(timer_event_handler); in nrfx_timer_init()
102 NRFX_ASSERT(NRF_TIMER_IS_BIT_WIDTH_VALID(p_instance->p_reg, p_config->bit_width)); in nrfx_timer_init()
150 NRFX_ASSERT(m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_INITIALIZED); in nrfx_timer_enable()
158 NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); in nrfx_timer_disable()
166 NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); in nrfx_timer_is_enabled()
193 NRFX_ASSERT(nrf_timer_mode_get(p_instance->p_reg) != NRF_TIMER_MODE_TIMER); in nrfx_timer_increment()
202 NRFX_ASSERT(cc_channel < p_instance->cc_channel_count); in nrfx_timer_capture()
259 NRFX_ASSERT(channel < p_instance->cc_channel_count); in nrfx_timer_compare_int_enable()
[all …]
A Dnrfx_ipc.c50 NRFX_ASSERT(handler); in nrfx_ipc_init()
68 NRFX_ASSERT(p_config); in nrfx_ipc_config_load()
69 NRFX_ASSERT(m_ipc_cb.state == NRFX_DRV_STATE_INITIALIZED); in nrfx_ipc_config_load()
87 NRFX_ASSERT(m_ipc_cb.state == NRFX_DRV_STATE_INITIALIZED); in nrfx_ipc_uninit()
106 NRFX_ASSERT(m_ipc_cb.state == NRFX_DRV_STATE_INITIALIZED); in nrfx_ipc_receive_event_enable()
112 NRFX_ASSERT(m_ipc_cb.state == NRFX_DRV_STATE_INITIALIZED); in nrfx_ipc_receive_event_disable()
118 NRFX_ASSERT(m_ipc_cb.state == NRFX_DRV_STATE_INITIALIZED); in nrfx_ipc_receive_event_group_enable()
124 NRFX_ASSERT(m_ipc_cb.state == NRFX_DRV_STATE_INITIALIZED); in nrfx_ipc_receive_event_group_disable()
130 NRFX_ASSERT(channel_index < IPC_CH_NUM); in nrfx_ipc_receive_event_channel_assign()
138 NRFX_ASSERT(channel_index < IPC_CH_NUM); in nrfx_ipc_send_task_channel_assign()
A Dnrfx_power.c100 NRFX_ASSERT(p_config); in nrfx_power_init()
127 NRFX_ASSERT(m_initialized); in nrfx_power_uninit()
150 NRFX_ASSERT(p_config != NULL); in nrfx_power_pof_init()
199 NRFX_ASSERT(p_config != NULL); in nrfx_power_sleepevt_init()
239 NRFX_ASSERT(p_config != NULL); in nrfx_power_usbevt_init()
281 NRFX_ASSERT(m_pofwarn_handler != NULL); in nrfx_power_irq_handler()
290 NRFX_ASSERT(m_sleepevt_handler != NULL); in nrfx_power_irq_handler()
297 NRFX_ASSERT(m_sleepevt_handler != NULL); in nrfx_power_irq_handler()
306 NRFX_ASSERT(m_usbevt_handler != NULL); in nrfx_power_irq_handler()
313 NRFX_ASSERT(m_usbevt_handler != NULL); in nrfx_power_irq_handler()
[all …]
A Dnrfx_adc.c59 NRFX_ASSERT(p_config); in nrfx_adc_init()
102 NRFX_ASSERT(!nrfx_adc_is_busy()); in nrfx_adc_channel_enable()
114 NRFX_ASSERT(p_channel != p_curr_channel); in nrfx_adc_channel_enable()
125 NRFX_ASSERT(m_cb.p_head); in nrfx_adc_channel_disable()
126 NRFX_ASSERT(!nrfx_adc_is_busy()); in nrfx_adc_channel_disable()
134 NRFX_ASSERT(p_curr_channel != NULL); in nrfx_adc_channel_disable()
150 NRFX_ASSERT(!nrfx_adc_is_busy()); in nrfx_adc_all_channels_disable()
157 NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); in nrfx_adc_sample()
158 NRFX_ASSERT(!nrf_adc_busy_check(NRF_ADC)); in nrfx_adc_sample()
195 NRFX_ASSERT(m_cb.event_handler); in nrfx_adc_sample_convert()
[all …]
A Dnrfx_egu.c98 NRFX_ASSERT(p_instance); in nrfx_egu_init()
121 NRFX_ASSERT(p_instance); in nrfx_egu_int_enable()
122 NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state == NRFX_DRV_STATE_INITIALIZED); in nrfx_egu_int_enable()
123 NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].handler); in nrfx_egu_int_enable()
131 NRFX_ASSERT(p_instance); in nrfx_egu_int_disable()
132 NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state == NRFX_DRV_STATE_INITIALIZED); in nrfx_egu_int_disable()
139 NRFX_ASSERT(p_instance); in nrfx_egu_trigger()
140 NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state == NRFX_DRV_STATE_INITIALIZED); in nrfx_egu_trigger()
141 NRFX_ASSERT(event_idx < nrf_egu_channel_count(p_instance->p_reg)); in nrfx_egu_trigger()
148 NRFX_ASSERT(p_instance); in nrfx_egu_uninit()
A Dnrfx_qspi.c122 NRFX_ASSERT(p_config); in nrfx_qspi_init()
167 NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); in nrfx_qspi_cinstr_xfer()
192 NRFX_ASSERT(p_config->wipwait); in nrfx_qspi_cinstr_xfer()
216 NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); in nrfx_qspi_lfm_start()
218 NRFX_ASSERT(p_config->length == NRF_QSPI_CINSTR_LEN_1B); in nrfx_qspi_lfm_start()
243 NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); in nrfx_qspi_lfm_xfer()
326 NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); in nrfx_qspi_uninit()
350 NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); in nrfx_qspi_write()
351 NRFX_ASSERT(p_tx_buffer != NULL); in nrfx_qspi_write()
366 NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); in nrfx_qspi_read()
[all …]
A Dnrfx_wdt.c61 NRFX_ASSERT(p_config); in nrfx_wdt_init()
88 NRFX_ASSERT(ticks <= UINT32_MAX); in nrfx_wdt_init()
110 NRFX_ASSERT(p_cb->alloc_index != 0); in nrfx_wdt_enable()
111 NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_INITIALIZED); in nrfx_wdt_enable()
121 NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_POWERED_ON); in nrfx_wdt_feed()
133 NRFX_ASSERT(p_channel_id); in nrfx_wdt_channel_alloc()
134 NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_INITIALIZED); in nrfx_wdt_channel_alloc()
155 NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state == NRFX_DRV_STATE_POWERED_ON); in nrfx_wdt_channel_feed()
A Dnrfx_rng.c53 NRFX_ASSERT(p_config); in nrfx_rng_init()
54 NRFX_ASSERT(handler); in nrfx_rng_init()
77 NRFX_ASSERT(m_rng_state == NRFX_DRV_STATE_INITIALIZED); in nrfx_rng_start()
85 NRFX_ASSERT(m_rng_state == NRFX_DRV_STATE_INITIALIZED); in nrfx_rng_stop()
92 NRFX_ASSERT(m_rng_state == NRFX_DRV_STATE_INITIALIZED); in nrfx_rng_uninit()
A Dnrfx_i2s.c190 NRFX_ASSERT(p_config); in nrfx_i2s_init()
191 NRFX_ASSERT(handler); in nrfx_i2s_init()
269 NRFX_ASSERT(p_initial_buffers != NULL); in nrfx_i2s_start()
270 NRFX_ASSERT(p_initial_buffers->p_rx_buffer != NULL || in nrfx_i2s_start()
278 NRFX_ASSERT(buffer_size != 0); in nrfx_i2s_start()
343 NRFX_ASSERT(m_cb.state == NRFX_DRV_STATE_POWERED_ON); in nrfx_i2s_next_buffers_set()
344 NRFX_ASSERT(p_buffers); in nrfx_i2s_next_buffers_set()
345 NRFX_ASSERT((p_buffers->p_rx_buffer == NULL) || in nrfx_i2s_next_buffers_set()
348 NRFX_ASSERT((p_buffers->p_tx_buffer == NULL) || in nrfx_i2s_next_buffers_set()
378 NRFX_ASSERT(p_buffers->p_tx_buffer != NULL); in nrfx_i2s_next_buffers_set()
[all …]
A Dnrfx_usbd.c457 NRFX_ASSERT(ep_size >= data_size); in nrfx_usbd_consumer()
941 NRFX_ASSERT(NRF_USBD_EPIN_CHECK(ep)); in nrf_usbd_epin_dma_handler()
942 NRFX_ASSERT(!NRF_USBD_EPISO_CHECK(ep)); in nrf_usbd_epin_dma_handler()
971 NRFX_ASSERT(NRF_USBD_EPIN_CHECK(ep)); in nrf_usbd_epiniso_dma_handler()
972 NRFX_ASSERT(NRF_USBD_EPISO_CHECK(ep)); in nrf_usbd_epiniso_dma_handler()
1035 NRFX_ASSERT(NRF_USBD_EPOUT_CHECK(ep)); in nrf_usbd_epout_dma_handler()
1073 NRFX_ASSERT(NRF_USBD_EPISO_CHECK(ep)); in nrf_usbd_epoutiso_dma_handler()
1661 NRFX_ASSERT(event_handler); in nrfx_usbd_init()
1944 NRFX_ASSERT((size & 0x01) == 0); in nrfx_usbd_ep_max_packet_size_set()
2022 NRFX_ASSERT(NULL != p_transfer); in nrfx_usbd_ep_transfer()
[all …]
A Dnrfx_lpcomp.c76 NRFX_ASSERT(p_config); in nrfx_lpcomp_init()
77 NRFX_ASSERT(event_handler); in nrfx_lpcomp_init()
137 NRFX_ASSERT(m_state != NRFX_DRV_STATE_UNINITIALIZED); in nrfx_lpcomp_uninit()
150 NRFX_ASSERT(m_state == NRFX_DRV_STATE_INITIALIZED); in nrfx_lpcomp_enable()
159 NRFX_ASSERT(m_state == NRFX_DRV_STATE_POWERED_ON); in nrfx_lpcomp_disable()
A Dnrfx_temp.c58 NRFX_ASSERT(p_config); in nrfx_temp_init()
84 NRFX_ASSERT(m_temp_state == NRFX_DRV_STATE_INITIALIZED); in nrfx_temp_uninit()
107 NRFX_ASSERT(m_temp_state == NRFX_DRV_STATE_INITIALIZED); in nrfx_temp_measure()
136 NRFX_ASSERT(m_data_handler); in nrfx_temp_irq_handler()
A Dnrfx_comp.c76 NRFX_ASSERT(p_config); in nrfx_comp_init()
77 NRFX_ASSERT(event_handler); in nrfx_comp_init()
148 NRFX_ASSERT(m_state != NRFX_DRV_STATE_UNINITIALIZED); in nrfx_comp_uninit()
177 NRFX_ASSERT(m_state == NRFX_DRV_STATE_INITIALIZED); in nrfx_comp_start()
187 NRFX_ASSERT(m_state == NRFX_DRV_STATE_POWERED_ON); in nrfx_comp_stop()
197 NRFX_ASSERT(m_state == NRFX_DRV_STATE_POWERED_ON); in nrfx_comp_sample()
A Dnrfx_qdec.c94 NRFX_ASSERT(p_config); in nrfx_qdec_init()
95 NRFX_ASSERT(event_handler); in nrfx_qdec_init()
156 NRFX_ASSERT(m_state != NRFX_DRV_STATE_UNINITIALIZED); in nrfx_qdec_uninit()
175 NRFX_ASSERT(m_state == NRFX_DRV_STATE_INITIALIZED); in nrfx_qdec_enable()
184 NRFX_ASSERT(m_state == NRFX_DRV_STATE_POWERED_ON); in nrfx_qdec_disable()
193 NRFX_ASSERT(m_state == NRFX_DRV_STATE_POWERED_ON); in nrfx_qdec_accumulators_read()
A Dnrfx_pwm.c135 NRFX_ASSERT(p_config); in nrfx_pwm_init()
196 NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); in nrfx_pwm_uninit()
291 NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); in nrfx_pwm_simple_playback()
292 NRFX_ASSERT(playback_count > 0); in nrfx_pwm_simple_playback()
293 NRFX_ASSERT(nrfx_is_in_ram(p_sequence->values.p_raw)); in nrfx_pwm_simple_playback()
337 NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); in nrfx_pwm_complex_playback()
338 NRFX_ASSERT(playback_count > 0); in nrfx_pwm_complex_playback()
339 NRFX_ASSERT(nrfx_is_in_ram(p_sequence_0->values.p_raw)); in nrfx_pwm_complex_playback()
340 NRFX_ASSERT(nrfx_is_in_ram(p_sequence_1->values.p_raw)); in nrfx_pwm_complex_playback()
380 NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state != NRFX_DRV_STATE_UNINITIALIZED); in nrfx_pwm_stop()
[all …]
A Dnrfx_clock.c179 NRFX_ASSERT(event_handler); in nrfx_clock_init()
204 NRFX_ASSERT(m_clock_cb.module_initialized); in nrfx_clock_enable()
224 NRFX_ASSERT(m_clock_cb.module_initialized); in nrfx_clock_disable()
226 NRFX_ASSERT(nrfx_clock_irq_enabled); in nrfx_clock_disable()
249 NRFX_ASSERT(m_clock_cb.module_initialized); in nrfx_clock_uninit()
264 NRFX_ASSERT(m_clock_cb.module_initialized); in nrfx_clock_start()
314 NRFX_ASSERT(0); in nrfx_clock_start()
321 NRFX_ASSERT(m_clock_cb.module_initialized); in nrfx_clock_stop()
349 NRFX_ASSERT(0); in nrfx_clock_stop()
506 NRFX_ASSERT(0); in nrfx_clock_divider_set()
A Dnrfx_rtc.c72 NRFX_ASSERT(p_config); in nrfx_rtc_init()
73 NRFX_ASSERT(handler); in nrfx_rtc_init()
107 NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); in nrfx_rtc_uninit()
121 NRFX_ASSERT(m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_INITIALIZED); in nrfx_rtc_enable()
130 NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); in nrfx_rtc_disable()
139 NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); in nrfx_rtc_cc_disable()
140 NRFX_ASSERT(channel < p_instance->cc_channel_count); in nrfx_rtc_cc_disable()
173 NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); in nrfx_rtc_cc_set()
174 NRFX_ASSERT(channel < p_instance->cc_channel_count); in nrfx_rtc_cc_set()
A Dnrfx_saadc.c126 NRFX_ASSERT(ch_to_activate_mask); in saadc_channel_count_get()
127 NRFX_ASSERT(ch_to_activate_mask < (1 << SAADC_CH_NUM)); in saadc_channel_count_get()
261 NRFX_ASSERT(m_cb.saadc_state != NRF_SAADC_STATE_UNINITIALIZED); in nrfx_saadc_channels_config()
262 NRFX_ASSERT(channel_count <= SAADC_CH_NUM); in nrfx_saadc_channels_config()
303 NRFX_ASSERT(m_cb.saadc_state != NRF_SAADC_STATE_UNINITIALIZED); in nrfx_saadc_simple_mode_set()
345 NRFX_ASSERT(m_cb.saadc_state != NRF_SAADC_STATE_UNINITIALIZED); in nrfx_saadc_advanced_mode_set()
346 NRFX_ASSERT(p_config); in nrfx_saadc_advanced_mode_set()
406 NRFX_ASSERT(m_cb.saadc_state != NRF_SAADC_STATE_UNINITIALIZED); in nrfx_saadc_buffer_set()
465 NRFX_ASSERT(m_cb.saadc_state != NRF_SAADC_STATE_UNINITIALIZED); in nrfx_saadc_mode_trigger()
466 NRFX_ASSERT(m_cb.saadc_state != NRF_SAADC_STATE_IDLE); in nrfx_saadc_mode_trigger()
[all …]
/lk-master/external/platform/nrfx/hal/
A Dnrf_acl.h117 NRFX_ASSERT(region_id < ACL_REGIONS_COUNT); in nrf_acl_region_set()
118 NRFX_ASSERT(address % nrf_ficr_codepagesize_get(NRF_FICR) == 0); in nrf_acl_region_set()
119 NRFX_ASSERT(size <= NRF_ACL_REGION_SIZE_MAX); in nrf_acl_region_set()
120 NRFX_ASSERT(size != 0); in nrf_acl_region_set()
121 NRFX_ASSERT(size % nrf_ficr_codepagesize_get(NRF_FICR) == 0); in nrf_acl_region_set()
A Dnrf_spu.h346 NRFX_ASSERT(!(p_reg->DPPI[dppi_id].LOCK & SPU_DPPI_LOCK_LOCK_Msk)); in nrf_spu_dppi_config_set()
361 NRFX_ASSERT(!(p_reg->GPIOPORT[gpio_port].LOCK & SPU_GPIOPORT_LOCK_LOCK_Msk)); in nrf_spu_gpio_config_set()
377 NRFX_ASSERT(!(p_reg->FLASHNSC[flash_nsc_id].REGION & SPU_FLASHNSC_REGION_LOCK_Msk)); in nrf_spu_flashnsc_set()
378 NRFX_ASSERT(!(p_reg->FLASHNSC[flash_nsc_id].SIZE & SPU_FLASHNSC_SIZE_LOCK_Msk)); in nrf_spu_flashnsc_set()
392 NRFX_ASSERT(!(p_reg->RAMNSC[ram_nsc_id].REGION & SPU_RAMNSC_REGION_LOCK_Msk)); in nrf_spu_ramnsc_set()
393 NRFX_ASSERT(!(p_reg->RAMNSC[ram_nsc_id].SIZE & SPU_RAMNSC_SIZE_LOCK_Msk)); in nrf_spu_ramnsc_set()
407 NRFX_ASSERT(!(p_reg->FLASHREGION[region_id].PERM & SPU_FLASHREGION_PERM_LOCK_Msk)); in nrf_spu_flashregion_set()
420 NRFX_ASSERT(!(p_reg->RAMREGION[region_id].PERM & SPU_RAMREGION_PERM_LOCK_Msk)); in nrf_spu_ramregion_set()
433 NRFX_ASSERT(p_reg->PERIPHID[peripheral_id].PERM & SPU_PERIPHID_PERM_PRESENT_Msk); in nrf_spu_peripheral_set()
434 NRFX_ASSERT(!(p_reg->PERIPHID[peripheral_id].PERM & SPU_PERIPHID_PERM_LOCK_Msk)); in nrf_spu_peripheral_set()
[all …]
A Dnrf_pwm.h657 NRFX_ASSERT(channel < NRF_PWM_CHANNEL_COUNT); in nrf_pwm_pin_get()
677 NRFX_ASSERT(p_seq != NULL); in nrf_pwm_sequence_set()
689 NRFX_ASSERT(seq_id <= 1); in nrf_pwm_seq_ptr_set()
690 NRFX_ASSERT(p_values != NULL); in nrf_pwm_seq_ptr_set()
698 NRFX_ASSERT(seq_id <= 1); in nrf_pwm_seq_cnt_set()
699 NRFX_ASSERT(length != 0); in nrf_pwm_seq_cnt_set()
700 NRFX_ASSERT(length <= PWM_SEQ_CNT_CNT_Msk); in nrf_pwm_seq_cnt_set()
708 NRFX_ASSERT(seq_id <= 1); in nrf_pwm_seq_refresh_set()
709 NRFX_ASSERT(refresh <= PWM_SEQ_REFRESH_CNT_Msk); in nrf_pwm_seq_refresh_set()
717 NRFX_ASSERT(seq_id <= 1); in nrf_pwm_seq_end_delay_set()
[all …]
A Dnrf_egu.h301 NRFX_ASSERT(p_reg); in nrf_egu_task_trigger()
308 NRFX_ASSERT(p_reg); in nrf_egu_task_address_get()
319 NRFX_ASSERT(p_reg); in nrf_egu_event_check()
325 NRFX_ASSERT(p_reg); in nrf_egu_event_clear()
333 NRFX_ASSERT(p_reg); in nrf_egu_event_address_get()
344 NRFX_ASSERT(p_reg); in nrf_egu_int_enable()
350 NRFX_ASSERT(p_reg); in nrf_egu_int_enable_check()
356 NRFX_ASSERT(p_reg); in nrf_egu_int_disable()
/lk-master/external/platform/nrfx/drivers/include/
A Dnrfx_ipc.h180 NRFX_ASSERT(mem_index < NRFX_ARRAY_SIZE(NRF_IPC->GPMEM)); in nrfx_ipc_gpmem_set()
186 NRFX_ASSERT(mem_index < NRFX_ARRAY_SIZE(NRF_IPC->GPMEM)); in nrfx_ipc_mem_get()
192 NRFX_ASSERT(send_index < IPC_CONF_NUM); in nrfx_ipc_signal()
198 NRFX_ASSERT(event_index < IPC_CONF_NUM); in nrfx_ipc_receive_config_set()
204 NRFX_ASSERT(send_index < IPC_CONF_NUM); in nrfx_ipc_send_config_set()

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