1 /*
2 * Copyright (c) 2015 Brian Swetland
3 *
4 * Use of this source code is governed by a MIT-style
5 * license that can be found in the LICENSE file or at
6 * https://opensource.org/licenses/MIT
7 */
8
9 #pragma once
10
11 #include <dev/gpio.h>
12
13 // pinmux
14 #define PIN(m,n) ((((m) & 0xFF) << 8) | ((n) & 0xFF))
15 #define _PINm(nr) (((nr) >> 8) & 0xFF)
16 #define _PINn(nr) ((nr) & 0xFF)
17
18 #define _PIN_CFG(m,n) (0x40086000 + ((m) * 0x80) + ((n) * 4))
19 #define PIN_CFG(nr) _PIN_CFG(_PINm(nr),_PINn(nr))
20
21 #define PIN_MODE(n) ((n) & 7)
22 #define PIN_PULLUP (0 << 3) // pull-up, no pull-down
23 #define PIN_REPEATER (1 << 3) // repeater mode
24 #define PIN_PLAIN (2 << 3) // no pull-up, no pull-down
25 #define PIN_PULLDOWN (3 << 3) // pull-down, no pull-up
26 #define PIN_SLOW (0 << 5) // slow slew rate (low noise, medium speed)
27 #define PIN_FAST (1 << 5) // fast slew rate (medium noise, fast speed)
28 #define PIN_INPUT (1 << 6) // enable input buffer, required for inputs
29 #define PIN_FILTER (1 << 7) // enable glitch filter, not for >30MHz signals
30
pin_config(unsigned nr,unsigned flags)31 static inline void pin_config(unsigned nr, unsigned flags) {
32 writel(flags, PIN_CFG(nr));
33 }
34
35 // gpio
36 #define GPIO(m,n) ((((m) & 0xFF) << 8) | ((n) & 0xFF))
37 #define _GPIOm(nr) (((nr) >> 8) & 0xFF)
38 #define _GPIOn(nr) ((nr) & 0xFF)
39
40 // each GPIO as a single byte or word register
41 // write zero to clear
42 // write non-zero to set
43 // reads as zero if input is low
44 // reads as FF (byte) or FFFFFFFF (word) if input is high
45 #define _GPIO_BYTE(m,n) (0x400F4000 + ((m) * 0x20) + (n))
46 #define _GPIO_WORD(m,n) (0x400F5000 + ((m) * 0x80) + ((n) * 4))
47 #define GPIO_BYTE(nr) _GPIO_BYTE(_GPIOm(nr),_GPIOn(nr))
48 #define GPIO_WORD(nr) _GPIO_WORD(_GPIOm(nr),_GPIOn(nr))
49
50 // GPIOs grouped by port, with one bit per pin
51 #define GPIO_DIR(m) (0x400F6000 + ((m) * 4)) // 1 = output, 0 = input
52 #define GPIO_MASK(m) (0x400F6080 + ((m) * 4)) // 1s disable MPIN() bits
53 #define GPIO_PIN(m) (0x400F6100 + ((m) * 4)) // r/w value at pins
54 #define GPIO_MPIN(m) (0x400F6180 + ((m) * 4)) // r value at pins & ~MASK
55 // w only MASK bits
56 #define GPIO_SET(m) (0x400F6200 + ((m) * 4)) // write 1s to set
57 #define GPIO_CLR(m) (0x400F6280 + ((m) * 4)) // write 1s to clear
58 #define GPIO_NOT(m) (0x400F6300 + ((m) * 4)) // write 1s to invert
59