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Searched refs:PLL_FDIV (Results 1 – 2 of 2) sorted by relevance

/lk-master/platform/zynq/
A Dplatform.c69 SLCR_REG(ARM_PLL_CTRL) = PLL_FDIV(cfg->arm.fdiv) | PLL_BYPASS_FORCE | PLL_RESET; in zynq_pll_init()
82 SLCR_REG(DDR_PLL_CTRL) = PLL_FDIV(cfg->ddr.fdiv) | PLL_BYPASS_FORCE | PLL_RESET; in zynq_pll_init()
98 SLCR_REG(IO_PLL_CTRL) = PLL_FDIV(cfg->io.fdiv) | PLL_BYPASS_FORCE | PLL_RESET; in zynq_pll_init()
/lk-master/platform/zynq/include/platform/
A Dzynq.h376 #define PLL_FDIV(x) ((x & BIT_MASK(7)) << 12) macro

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