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Searched refs:RCC_APB1PeriphResetCmd (Results 1 – 25 of 34) sorted by relevance

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/lk-master/external/platform/stm32f4xx/STM32F4xx_StdPeriph_Driver/src/
A Dstm32f4xx_usart.c199 RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, ENABLE); in USART_DeInit()
200 RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, DISABLE); in USART_DeInit()
204 RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, ENABLE); in USART_DeInit()
205 RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, DISABLE); in USART_DeInit()
209 RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, ENABLE); in USART_DeInit()
210 RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, DISABLE); in USART_DeInit()
214 RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART5, ENABLE); in USART_DeInit()
215 RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART5, DISABLE); in USART_DeInit()
224 RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART7, ENABLE); in USART_DeInit()
225 RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART7, DISABLE); in USART_DeInit()
[all …]
A Dstm32f4xx_wwdg.c140 RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE); in WWDG_DeInit()
141 RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE); in WWDG_DeInit()
A Dstm32f4xx_tim.c212 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, ENABLE); in TIM_DeInit()
213 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, DISABLE); in TIM_DeInit()
217 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, ENABLE); in TIM_DeInit()
218 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, DISABLE); in TIM_DeInit()
222 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, ENABLE); in TIM_DeInit()
223 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, DISABLE); in TIM_DeInit()
227 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM5, ENABLE); in TIM_DeInit()
228 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM5, DISABLE); in TIM_DeInit()
232 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM6, ENABLE); in TIM_DeInit()
233 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM6, DISABLE); in TIM_DeInit()
[all …]
A Dstm32f4xx_i2c.c145 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE); in I2C_DeInit()
147 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE); in I2C_DeInit()
152 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, ENABLE); in I2C_DeInit()
154 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, DISABLE); in I2C_DeInit()
161 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C3, ENABLE); in I2C_DeInit()
163 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C3, DISABLE); in I2C_DeInit()
A Dstm32f4xx_cec.c148 RCC_APB1PeriphResetCmd(RCC_APB1Periph_CEC, ENABLE); in CEC_DeInit()
149 RCC_APB1PeriphResetCmd(RCC_APB1Periph_CEC, DISABLE); in CEC_DeInit()
A Dstm32f4xx_spdifrx.c89 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPDIFRX, ENABLE); in SPDIFRX_DeInit()
91 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPDIFRX, DISABLE); in SPDIFRX_DeInit()
A Dstm32f4xx_spi.c239 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE); in SPI_I2S_DeInit()
241 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE); in SPI_I2S_DeInit()
246 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE); in SPI_I2S_DeInit()
248 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, DISABLE); in SPI_I2S_DeInit()
A Dstm32f4xx_dac.c190 RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, ENABLE); in DAC_DeInit()
192 RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, DISABLE); in DAC_DeInit()
A Dstm32f4xx_pwr.c166 RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, ENABLE); in PWR_DeInit()
167 RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, DISABLE); in PWR_DeInit()
/lk-master/external/platform/stm32f2xx/STM32F2xx_StdPeriph_Driver/src/
A Dstm32f2xx_usart.c196 RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, ENABLE); in USART_DeInit()
197 RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, DISABLE); in USART_DeInit()
201 RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, ENABLE); in USART_DeInit()
202 RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, DISABLE); in USART_DeInit()
206 RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, ENABLE); in USART_DeInit()
207 RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, DISABLE); in USART_DeInit()
211 RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART5, ENABLE); in USART_DeInit()
212 RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART5, DISABLE); in USART_DeInit()
A Dstm32f2xx_wwdg.c142 RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE); in WWDG_DeInit()
143 RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE); in WWDG_DeInit()
A Dstm32f2xx_tim.c212 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, ENABLE); in TIM_DeInit()
213 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, DISABLE); in TIM_DeInit()
217 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, ENABLE); in TIM_DeInit()
218 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, DISABLE); in TIM_DeInit()
222 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, ENABLE); in TIM_DeInit()
223 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, DISABLE); in TIM_DeInit()
227 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM5, ENABLE); in TIM_DeInit()
228 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM5, DISABLE); in TIM_DeInit()
232 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM6, ENABLE); in TIM_DeInit()
233 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM6, DISABLE); in TIM_DeInit()
[all …]
A Dstm32f2xx_i2c.c146 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE); in I2C_DeInit()
148 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE); in I2C_DeInit()
153 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, ENABLE); in I2C_DeInit()
155 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, DISABLE); in I2C_DeInit()
162 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C3, ENABLE); in I2C_DeInit()
164 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C3, DISABLE); in I2C_DeInit()
A Dstm32f2xx_pwr.c123 RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, ENABLE); in PWR_DeInit()
124 RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, DISABLE); in PWR_DeInit()
A Dstm32f2xx_spi.c192 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE); in SPI_I2S_DeInit()
194 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE); in SPI_I2S_DeInit()
201 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE); in SPI_I2S_DeInit()
203 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, DISABLE); in SPI_I2S_DeInit()
A Dstm32f2xx_dac.c183 RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, ENABLE); in DAC_DeInit()
185 RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, DISABLE); in DAC_DeInit()
/lk-master/external/platform/stm32f1xx/STM32F10x_StdPeriph_Driver/src/
A Dstm32f10x_usart.c140 RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, ENABLE); in USART_DeInit()
141 RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, DISABLE); in USART_DeInit()
145 RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, ENABLE); in USART_DeInit()
146 RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, DISABLE); in USART_DeInit()
150 RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, ENABLE); in USART_DeInit()
151 RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, DISABLE); in USART_DeInit()
157 RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART5, ENABLE); in USART_DeInit()
158 RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART5, DISABLE); in USART_DeInit()
A Dstm32f10x_wwdg.c103 RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE); in WWDG_DeInit()
104 RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE); in WWDG_DeInit()
A Dstm32f10x_pwr.c113 RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, ENABLE); in PWR_DeInit()
114 RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, DISABLE); in PWR_DeInit()
A Dstm32f10x_tim.c133 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, ENABLE); in TIM_DeInit()
134 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, DISABLE); in TIM_DeInit()
138 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, ENABLE); in TIM_DeInit()
139 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, DISABLE); in TIM_DeInit()
143 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, ENABLE); in TIM_DeInit()
144 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, DISABLE); in TIM_DeInit()
148 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM5, ENABLE); in TIM_DeInit()
149 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM5, DISABLE); in TIM_DeInit()
153 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM6, ENABLE); in TIM_DeInit()
154 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM6, DISABLE); in TIM_DeInit()
[all …]
A Dstm32f10x_cec.c120 RCC_APB1PeriphResetCmd(RCC_APB1Periph_CEC, ENABLE); in CEC_DeInit()
122 RCC_APB1PeriphResetCmd(RCC_APB1Periph_CEC, DISABLE); in CEC_DeInit()
A Dstm32f10x_spi.c133 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE); in SPI_I2S_DeInit()
135 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE); in SPI_I2S_DeInit()
142 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE); in SPI_I2S_DeInit()
144 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, DISABLE); in SPI_I2S_DeInit()
A Dstm32f10x_i2c.c169 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE); in I2C_DeInit()
171 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE); in I2C_DeInit()
176 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, ENABLE); in I2C_DeInit()
178 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, DISABLE); in I2C_DeInit()
A Dstm32f10x_dac.c100 RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, ENABLE); in DAC_DeInit()
102 RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, DISABLE); in DAC_DeInit()
A Dstm32f10x_can.c122 RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN1, ENABLE); in CAN_DeInit()
124 RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN1, DISABLE); in CAN_DeInit()
129 RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN2, ENABLE); in CAN_DeInit()
131 RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN2, DISABLE); in CAN_DeInit()

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