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Searched refs:READ_BIT (Results 1 – 25 of 41) sorted by relevance

12

/lk-master/external/platform/stm32f0xx/STM32F0xx_HAL_Driver/inc/
A Dstm32f0xx_ll_system.h380 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE)); in LL_SYSCFG_GetRemapMemory()
408 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_IR_MOD)); in LL_SYSCFG_GetIRModEnvelopeSignal()
705 return (READ_BIT(SYSCFG->IT_LINE_SR[0], SYSCFG_ITLINE0_SR_EWDG) == (SYSCFG_ITLINE0_SR_EWDG)); in LL_SYSCFG_IsActiveFlag_WWDG()
789 return (READ_BIT(SYSCFG->IT_LINE_SR[4], SYSCFG_ITLINE4_SR_CRS) == (SYSCFG_ITLINE4_SR_CRS)); in LL_SYSCFG_IsActiveFlag_CRS()
1173 return (READ_BIT(SYSCFG->IT_LINE_SR[12], SYSCFG_ITLINE12_SR_ADC) == (SYSCFG_ITLINE12_SR_ADC)); in LL_SYSCFG_IsActiveFlag_ADC()
1293 return (READ_BIT(SYSCFG->IT_LINE_SR[17], SYSCFG_ITLINE17_SR_DAC) == (SYSCFG_ITLINE17_SR_DAC)); in LL_SYSCFG_IsActiveFlag_DAC()
1574 return (uint32_t)(READ_BIT(SYSCFG->CFGR2, in LL_SYSCFG_GetTIMBreakInputs()
1588 return (READ_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_SRAM_PEF) == (SYSCFG_CFGR2_SRAM_PEF)); in LL_SYSCFG_IsActiveFlag_SP()
1621 return (uint32_t)(READ_BIT(DBGMCU->IDCODE, DBGMCU_IDCODE_DEV_ID)); in LL_DBGMCU_GetDeviceID()
1809 return (uint32_t)(READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY)); in LL_FLASH_GetLatency()
[all …]
A Dstm32f0xx_ll_i2c.h434 return (READ_BIT(I2Cx->CR1, I2C_CR1_PE) == (I2C_CR1_PE)); in LL_I2C_IsEnabled()
678 return (READ_BIT(I2Cx->CR1, I2C_CR1_SBC) == (I2C_CR1_SBC)); in LL_I2C_IsEnabledSlaveByteControl()
783 return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_ADD10)); in LL_I2C_GetMasterAddressingMode()
1531 return (READ_BIT(I2Cx->ISR, I2C_ISR_TXE) == (I2C_ISR_TXE)); in LL_I2C_IsActiveFlag_TXE()
1609 return (READ_BIT(I2Cx->ISR, I2C_ISR_TC) == (I2C_ISR_TC)); in LL_I2C_IsActiveFlag_TC()
1622 return (READ_BIT(I2Cx->ISR, I2C_ISR_TCR) == (I2C_ISR_TCR)); in LL_I2C_IsActiveFlag_TCR()
2043 return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_RD_WRN)); in LL_I2C_GetTransferRequest()
2067 return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_SADD)); in LL_I2C_GetSlaveAddr()
2128 return (uint32_t)(READ_BIT(I2Cx->ISR, I2C_ISR_DIR)); in LL_I2C_GetTransferDirection()
2181 return (uint32_t)(READ_BIT(I2Cx->PECR, I2C_PECR_PEC)); in LL_I2C_GetSMBusPEC()
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A Dstm32f0xx_ll_crs.h259 return (READ_BIT(CRS->CR, CRS_CR_CEN) == (CRS_CR_CEN)); in LL_CRS_IsEnabledFreqErrorCounter()
335 return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_RELOAD)); in LL_CRS_GetReloadCounter()
394 return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_SYNCDIV)); in LL_CRS_GetSyncDivider()
421 return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_SYNCSRC)); in LL_CRS_GetSyncSignalSource()
446 return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_SYNCPOL)); in LL_CRS_GetSyncPolarity()
503 return (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FEDIR)); in LL_CRS_GetFreqErrorDirection()
551 return (READ_BIT(CRS->ISR, CRS_ISR_ERRF) == (CRS_ISR_ERRF)); in LL_CRS_IsActiveFlag_ERR()
561 return (READ_BIT(CRS->ISR, CRS_ISR_ESYNCF) == (CRS_ISR_ESYNCF)); in LL_CRS_IsActiveFlag_ESYNC()
670 return (READ_BIT(CRS->CR, CRS_CR_SYNCOKIE) == (CRS_CR_SYNCOKIE)); in LL_CRS_IsEnabledIT_SYNCOK()
730 return (READ_BIT(CRS->CR, CRS_CR_ERRIE) == (CRS_CR_ERRIE)); in LL_CRS_IsEnabledIT_ERR()
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A Dstm32f0xx_ll_usart.h783 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_WAKE)); in LL_USART_GetWakeUpMethod()
818 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_M)); in LL_USART_GetDataWidth()
910 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBCL)); in LL_USART_GetLastClkPulseOutput()
941 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPHA)); in LL_USART_GetClockPhase()
972 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPOL)); in LL_USART_GetClockPolarity()
1074 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_STOP)); in LL_USART_GetStopBitsLength()
1137 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_SWAP)); in LL_USART_GetTXRXSwap()
1608 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_WUS)); in LL_USART_GetWKUPType()
2276 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_DEP)); in LL_USART_GetDESignalPolarity()
3674 return (uint8_t)(READ_BIT(USARTx->RDR, USART_RDR_RDR)); in LL_USART_ReceiveData8()
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A Dstm32f0xx_ll_rcc.h1044 return (uint32_t)(READ_BIT(RCC->BDCR, RCC_BDCR_LSEDRV)); in LL_RCC_LSE_GetDriveCapability()
1133 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_SWS)); in LL_RCC_GetSysClkSource()
1188 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_HPRE)); in LL_RCC_GetAHBPrescaler()
1203 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE)); in LL_RCC_GetAPB1Prescaler()
1382 return (uint32_t)(READ_BIT(RCC->CFGR3, I2Cx)); in LL_RCC_GetI2CClockSource()
1397 return (uint32_t)(READ_BIT(RCC->CFGR3, CECx)); in LL_RCC_GetCECClockSource()
1416 return (uint32_t)(READ_BIT(RCC->CFGR3, USBx)); in LL_RCC_GetUSBClockSource()
1456 return (uint32_t)(READ_BIT(RCC->BDCR, RCC_BDCR_RTCSEL)); in LL_RCC_GetRTCClockSource()
1664 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLSRC)); in LL_RCC_PLL_GetMainSource()
1689 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLMUL)); in LL_RCC_PLL_GetMultiplicator()
[all …]
A Dstm32f0xx_ll_rtc.h751 return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_FMT)); in LL_RTC_GetHourFormat()
783 return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_OSEL)); in LL_RTC_GetAlarmOutEvent()
941 return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_POL)); in LL_RTC_GetOutputPolarity()
1111 return (uint32_t)(READ_BIT(RTCx->TR, RTC_TR_PM)); in LL_RTC_TIME_GetFormat()
1148 temp = READ_BIT(RTCx->TR, (RTC_TR_HT | RTC_TR_HU)); in LL_RTC_TIME_GetHour()
1224 temp = READ_BIT(RTCx->TR, (RTC_TR_ST | RTC_TR_SU)); in LL_RTC_TIME_GetSecond()
1361 return (uint32_t)(READ_BIT(RTCx->SSR, RTC_SSR_SS)); in LL_RTC_TIME_GetSubSecond()
1420 temp = READ_BIT(RTCx->DR, (RTC_DR_YT | RTC_DR_YU)); in LL_RTC_DATE_GetYear()
1516 temp = READ_BIT(RTCx->DR, (RTC_DR_MT | RTC_DR_MU)); in LL_RTC_DATE_GetMonth()
2134 return (uint32_t)(READ_BIT(RTCx->TSTR, in LL_RTC_TS_GetTime()
[all …]
A Dstm32f0xx_ll_spi.h458 return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_FRF)); in LL_SPI_GetStandard()
487 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA)); in LL_SPI_GetClockPhase()
516 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPOL)); in LL_SPI_GetClockPolarity()
556 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_BR)); in LL_SPI_GetBaudRatePrescaler()
670 return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_DS)); in LL_SPI_GetDataWidth()
697 return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_FRXTH)); in LL_SPI_GetRxFIFOThreshold()
769 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CRCL)); in LL_SPI_GetCRCWidth()
935 return (READ_BIT(SPIx->SR, SPI_SR_TXE) == (SPI_SR_TXE)); in LL_SPI_IsActiveFlag_TXE()
968 return (READ_BIT(SPIx->SR, SPI_SR_OVR) == (SPI_SR_OVR)); in LL_SPI_IsActiveFlag_OVR()
1012 return (uint32_t)(READ_BIT(SPIx->SR, SPI_SR_FRLVL)); in LL_SPI_GetRxFIFOLevel()
[all …]
A Dstm32f0xx_ll_cortex.h145 return READ_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK); in LL_SYSTICK_GetClkSource()
175 return (READ_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk) == (SysTick_CTRL_TICKINT_Msk)); in LL_SYSTICK_IsEnabledIT()
271 return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_IMPLEMENTER_Msk) >> SCB_CPUID_IMPLEMENTER_Pos); in LL_CPUID_GetImplementer()
281 return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_VARIANT_Msk) >> SCB_CPUID_VARIANT_Pos); in LL_CPUID_GetVariant()
291 return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_ARCHITECTURE_Msk) >> SCB_CPUID_ARCHITECTURE_Pos); in LL_CPUID_GetArchitecture()
301 return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_PARTNO_Msk) >> SCB_CPUID_PARTNO_Pos); in LL_CPUID_GetParNo()
311 return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_REVISION_Msk) >> SCB_CPUID_REVISION_Pos); in LL_CPUID_GetRevision()
A Dstm32f0xx_ll_pwr.h250 return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP)); in LL_PWR_IsEnabledBkUpAccess()
276 return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPDS)); in LL_PWR_GetRegulModeDS()
306 return (uint32_t)(READ_BIT(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS))); in LL_PWR_GetPowerMode()
344 return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PLS)); in LL_PWR_GetPVDLevel()
374 return (READ_BIT(PWR->CR, PWR_CR_PVDE) == (PWR_CR_PVDE)); in LL_PWR_IsEnabledPVD()
459 return (READ_BIT(PWR->CSR, WakeUpPin) == (WakeUpPin)); in LL_PWR_IsEnabledWakeUpPin()
478 return (READ_BIT(PWR->CSR, PWR_CSR_WUF) == (PWR_CSR_WUF)); in LL_PWR_IsActiveFlag_WU()
488 return (READ_BIT(PWR->CSR, PWR_CSR_SBF) == (PWR_CSR_SBF)); in LL_PWR_IsActiveFlag_SB()
499 return (READ_BIT(PWR->CSR, PWR_CSR_PVDO) == (PWR_CSR_PVDO)); in LL_PWR_IsActiveFlag_PVDO()
511 return (READ_BIT(PWR->CSR, PWR_CSR_VREFINTRDYF) == (PWR_CSR_VREFINTRDYF)); in LL_PWR_IsActiveFlag_VREFINTRDY()
A Dstm32f0xx_ll_adc.h1595 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_RES)); in LL_ADC_GetResolution()
1630 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_ALIGN)); in LL_ADC_GetDataAlignment()
1806 return (uint32_t)(READ_BIT(ADCx->SMPR, ADC_SMPR_SMP)); in LL_ADC_GetSamplingTimeCommonChannels()
1941 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN)); in LL_ADC_REG_GetTriggerEdge()
2384 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_CONT)); in LL_ADC_REG_GetContinuousMode()
2733 return (uint32_t)(READ_BIT(ADCx->TR, in LL_ADC_GetAnalogWDThresholds()
2953 return (uint32_t)(READ_BIT(ADCx->DR, ADC_DR_DATA)); in LL_ADC_REG_ReadConversionData32()
2968 return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA)); in LL_ADC_REG_ReadConversionData12()
2983 return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA)); in LL_ADC_REG_ReadConversionData10()
2998 return (uint8_t)(READ_BIT(ADCx->DR, ADC_DR_DATA)); in LL_ADC_REG_ReadConversionData8()
[all …]
A Dstm32f0xx_ll_wwdg.h158 return (READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)); in LL_WWDG_IsEnabled()
185 return (uint32_t)(READ_BIT(WWDGx->CR, WWDG_CR_T)); in LL_WWDG_GetCounter()
218 return (uint32_t)(READ_BIT(WWDGx->CFR, WWDG_CFR_WDGTB)); in LL_WWDG_GetPrescaler()
250 return (uint32_t)(READ_BIT(WWDGx->CFR, WWDG_CFR_W)); in LL_WWDG_GetWindow()
271 return (READ_BIT(WWDGx->SR, WWDG_SR_EWIF) == (WWDG_SR_EWIF)); in LL_WWDG_IsActiveFlag_EWKUP()
313 return (READ_BIT(WWDGx->CFR, WWDG_CFR_EWI) == (WWDG_CFR_EWI)); in LL_WWDG_IsEnabledIT_EWKUP()
A Dstm32f0xx_ll_dma.h1344 return (READ_BIT(DMAx->CSELR, in LL_DMA_GetPeriphRequest()
1365 return (READ_BIT(DMAx->ISR, DMA_ISR_GIF1) == (DMA_ISR_GIF1)); in LL_DMA_IsActiveFlag_GI1()
1376 return (READ_BIT(DMAx->ISR, DMA_ISR_GIF2) == (DMA_ISR_GIF2)); in LL_DMA_IsActiveFlag_GI2()
1387 return (READ_BIT(DMAx->ISR, DMA_ISR_GIF3) == (DMA_ISR_GIF3)); in LL_DMA_IsActiveFlag_GI3()
1398 return (READ_BIT(DMAx->ISR, DMA_ISR_GIF4) == (DMA_ISR_GIF4)); in LL_DMA_IsActiveFlag_GI4()
1409 return (READ_BIT(DMAx->ISR, DMA_ISR_GIF5) == (DMA_ISR_GIF5)); in LL_DMA_IsActiveFlag_GI5()
1421 return (READ_BIT(DMAx->ISR, DMA_ISR_GIF6) == (DMA_ISR_GIF6)); in LL_DMA_IsActiveFlag_GI6()
1434 return (READ_BIT(DMAx->ISR, DMA_ISR_GIF7) == (DMA_ISR_GIF7)); in LL_DMA_IsActiveFlag_GI7()
1446 return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF1) == (DMA_ISR_TCIF1)); in LL_DMA_IsActiveFlag_TC1()
1457 return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF2) == (DMA_ISR_TCIF2)); in LL_DMA_IsActiveFlag_TC2()
[all …]
A Dstm32f0xx_ll_tim.h1102 return (READ_BIT(TIMx->CR1, TIM_CR1_UDIS) == RESET); in LL_TIM_IsEnabledUpdateEvent()
1136 return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_URS)); in LL_TIM_GetUpdateSource()
1163 return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_OPM)); in LL_TIM_GetOnePulseMode()
1272 return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CKD)); in LL_TIM_GetClockDivision()
1312 return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR)); in LL_TIM_GetDirection()
1474 return (uint32_t)(READ_BIT(TIMx->CR2, TIM_CR2_CCDS)); in LL_TIM_CC_GetDMAReqTrigger()
1568 return (READ_BIT(TIMx->CCER, Channels) == (Channels)); in LL_TIM_CC_IsEnabledChannel()
1856 return (READ_BIT(*pReg, bitfield) == bitfield); in LL_TIM_OC_IsEnabledFast()
1920 return (READ_BIT(*pReg, bitfield) == bitfield); in LL_TIM_OC_IsEnabledPreload()
1993 return (READ_BIT(*pReg, bitfield) == bitfield); in LL_TIM_OC_IsEnabledClear()
[all …]
A Dstm32f0xx_ll_comp.h378 return (uint32_t)(READ_BIT(COMPxy_COMMON->CSR, COMP_CSR_WNDWEN)); in LL_COMP_GetCommonWindowMode()
421 return (uint32_t)(READ_BIT(COMP->CSR, in LL_COMP_GetPowerMode()
512 return (uint32_t)(READ_BIT(COMP->CSR, in LL_COMP_GetInputPlus()
560 return (uint32_t)(READ_BIT(COMP->CSR, in LL_COMP_GetInputMinus()
598 return (uint32_t)(READ_BIT(COMP->CSR, in LL_COMP_GetInputHysteresis()
663 return (uint32_t)(READ_BIT(COMP->CSR, in LL_COMP_GetOutputSelection()
697 return (uint32_t)(READ_BIT(COMP->CSR, in LL_COMP_GetOutputPolarity()
748 …return (READ_BIT(COMP->CSR, COMP_CSR_COMP1EN << __COMP_BITOFFSET_INSTANCE(COMPx)) == COMP_CSR_COMP… in LL_COMP_IsEnabled()
777 …return (READ_BIT(COMP->CSR, COMP_CSR_COMP1LOCK << __COMP_BITOFFSET_INSTANCE(COMPx)) == COMP_CSR_CO… in LL_COMP_IsLocked()
803 return (uint32_t)(READ_BIT(COMP->CSR, in LL_COMP_ReadOutputLevel()
A Dstm32f0xx_ll_gpio.h320 return (uint32_t)(READ_BIT(GPIOx->MODER, ((Pin * Pin) * GPIO_MODER_MODER0)) / (Pin * Pin)); in LL_GPIO_GetPinMode()
388 return (uint32_t)(READ_BIT(GPIOx->OTYPER, Pin) / Pin); in LL_GPIO_GetPinOutputType()
459 return (uint32_t)(READ_BIT(GPIOx->OSPEEDR, ((Pin * Pin) * GPIO_OSPEEDR_OSPEEDR0)) / (Pin * Pin)); in LL_GPIO_GetPinSpeed()
524 return (uint32_t)(READ_BIT(GPIOx->PUPDR, ((Pin * Pin) * GPIO_PUPDR_PUPDR0)) / (Pin * Pin)); in LL_GPIO_GetPinPull()
584 return (uint32_t)(READ_BIT(GPIOx->AFR[0], in LL_GPIO_GetAFPin_0_7()
646 return (uint32_t)(READ_BIT(GPIOx->AFR[1], in LL_GPIO_GetAFPin_8_15()
717 return (READ_BIT(GPIOx->LCKR, PinMask) == (PinMask)); in LL_GPIO_IsPinLocked()
728 return (READ_BIT(GPIOx->LCKR, GPIO_LCKR_LCKK) == (GPIO_LCKR_LCKK)); in LL_GPIO_IsAnyPinLocked()
776 return (READ_BIT(GPIOx->IDR, PinMask) == (PinMask)); in LL_GPIO_IsInputPinSet()
828 return (READ_BIT(GPIOx->ODR, PinMask) == (PinMask)); in LL_GPIO_IsOutputPinSet()
A Dstm32f0xx_ll_bus.h248 tmpreg = READ_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_EnableClock()
285 return (READ_BIT(RCC->AHBENR, Periphs) == Periphs); in LL_AHB1_GRP1_IsEnabledClock()
436 tmpreg = READ_BIT(RCC->APB1ENR, Periphs); in LL_APB1_GRP1_EnableClock()
487 return (READ_BIT(RCC->APB1ENR, Periphs) == Periphs); in LL_APB1_GRP1_IsEnabledClock()
686 tmpreg = READ_BIT(RCC->APB2ENR, Periphs); in LL_APB1_GRP2_EnableClock()
723 return (READ_BIT(RCC->APB2ENR, Periphs) == Periphs); in LL_APB1_GRP2_IsEnabledClock()
A Dstm32f0xx_ll_exti.h389 return (READ_BIT(EXTI->IMR, ExtiLine) == (ExtiLine)); in LL_EXTI_IsEnabledIT_0_31()
536 return (READ_BIT(EXTI->EMR, ExtiLine) == (ExtiLine)); in LL_EXTI_IsEnabledEvent_0_31()
675 return (READ_BIT(EXTI->RTSR, ExtiLine) == (ExtiLine)); in LL_EXTI_IsEnabledRisingTrig_0_31()
810 return (READ_BIT(EXTI->FTSR, ExtiLine) == (ExtiLine)); in LL_EXTI_IsEnabledFallingTrig_0_31()
909 return (READ_BIT(EXTI->PR, ExtiLine) == (ExtiLine)); in LL_EXTI_IsActiveFlag_0_31()
949 return (uint32_t)(READ_BIT(EXTI->PR, ExtiLine)); in LL_EXTI_ReadFlag_0_31()
A Dstm32f0xx_hal_rcc.h642 tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_GPIOAEN);\
649 tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_GPIOBEN);\
656 tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_GPIOCEN);\
663 tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_GPIOFEN);\
670 tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_CRCEN);\
677 tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_DMA1EN);\
684 tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_SRAMEN);\
1230 #define __HAL_RCC_GET_I2C1_SOURCE() ((uint32_t)(READ_BIT(RCC->CFGR3, RCC_CFGR3_I2C1SW)))
1278 #define __HAL_RCC_GET_PLL_OSCSOURCE() ((uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLSRC)))
1306 #define __HAL_RCC_GET_SYSCLK_SOURCE() ((uint32_t)(READ_BIT(RCC->CFGR,RCC_CFGR_SWS)))
[all …]
A Dstm32f0xx_ll_dac.h586 return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_TSEL1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) in LL_DAC_GetTriggerSource()
636 return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_WAVE1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) in LL_DAC_GetWaveAutoGeneration()
708 return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) in LL_DAC_GetWaveNoiseLFSR()
897 return (READ_BIT(DACx->CR, in LL_DAC_IsDMAReqEnabled()
1007 return (READ_BIT(DACx->CR, in LL_DAC_IsEnabled()
1074 return (READ_BIT(DACx->CR, in LL_DAC_IsTriggerEnabled()
1262 return (uint16_t) READ_BIT(*preg, DAC_DOR1_DACC1DOR); in LL_DAC_RetrieveOutputData()
1280 return (READ_BIT(DACx->SR, LL_DAC_FLAG_DMAUDR1) == (LL_DAC_FLAG_DMAUDR1)); in LL_DAC_IsActiveFlag_DMAUDR1()
1292 return (READ_BIT(DACx->SR, LL_DAC_FLAG_DMAUDR2) == (LL_DAC_FLAG_DMAUDR2)); in LL_DAC_IsActiveFlag_DMAUDR2()
1384 return (READ_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1) == (LL_DAC_IT_DMAUDRIE1)); in LL_DAC_IsEnabledIT_DMAUDR1()
[all …]
A Dstm32f0xx_hal_rcc_ex.h961 tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_GPIODEN);\
975 tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_GPIOEEN);\
992 tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_TSCEN);\
1009 tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_DMA2EN);\
1122 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_DACEN);\
1141 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_CECEN);\
1191 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_USBEN);\
1207 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_CANEN);\
1779 #define __HAL_RCC_GET_USB_SOURCE() ((uint32_t)(READ_BIT(RCC->CFGR3, RCC_CFGR3_USBSW)))
1804 #define __HAL_RCC_GET_CEC_SOURCE() ((uint32_t)(READ_BIT(RCC->CFGR3, RCC_CFGR3_CECSW)))
[all …]
A Dstm32f0xx_ll_iwdg.h298 return (READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU)); in LL_IWDG_IsActiveFlag_PVU()
309 return (READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU)); in LL_IWDG_IsActiveFlag_RVU()
320 return (READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)); in LL_IWDG_IsActiveFlag_WVU()
333 return (READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U); in LL_IWDG_IsReady()
A Dstm32f0xx_ll_crc.h215 return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_POLYSIZE)); in LL_CRC_GetPolynomialSize()
247 return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_REV_IN)); in LL_CRC_GetInputDataReverseMode()
274 return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_REV_OUT)); in LL_CRC_GetOutputDataReverseMode()
/lk-master/external/platform/stm32f7xx/STM32F7xx_HAL_Driver/Inc/
A Dstm32f7xx_hal_rcc_ex.h511 tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN);\
519 tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2DEN);\
527 tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_OTGHSEN);\
706 tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_DCMIEN);\
714 tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN);\
738 tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_CRYPEN);\
746 tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN);\
762 tmpreg = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);\
970 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_CECEN);\
978 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_DACEN);\
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/lk-master/external/platform/stm32f0xx/STM32F0xx_HAL_Driver/
A Dstm32f0xx_hal_rcc_ex.c733 pSynchroInfo->ReloadValue = (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_RELOAD)); in HAL_RCCEx_CRSGetSynchronizationInfo()
736 …pSynchroInfo->HSI48CalibrationValue = (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_BIT… in HAL_RCCEx_CRSGetSynchronizationInfo()
739 …pSynchroInfo->FreqErrorCapture = (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FECAP) >> CRS_ISR_FECAP_BIT… in HAL_RCCEx_CRSGetSynchronizationInfo()
742 pSynchroInfo->FreqErrorDirection = (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FEDIR)); in HAL_RCCEx_CRSGetSynchronizationInfo()
A Dstm32f0xx_hal_adc_ex.c139 …backup_setting_adc_dma_transfer = READ_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMAC… in HAL_ADCEx_Calibration_Start()

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