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Searched refs:RISCV_CSR_XIE_EIE (Results 1 – 2 of 2) sorted by relevance

/lk-master/arch/riscv/
A Darch.c56 riscv_csr_clear(RISCV_CSR_XIE, RISCV_CSR_XIE_SIE | RISCV_CSR_XIE_TIE | RISCV_CSR_XIE_EIE); in riscv_early_init_percpu()
83 riscv_csr_set(RISCV_CSR_XIE, RISCV_CSR_XIE_EIE); in riscv_init_percpu()
/lk-master/arch/riscv/include/arch/
A Driscv.h71 #define RISCV_CSR_XIE_EIE (1ul << (RISCV_XMODE_OFFSET + 8)) macro

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