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Searched refs:RMWREG32 (Results 1 – 2 of 2) sorted by relevance

/lk-master/platform/zynq/
A Dgpio.c67 RMWREG32(GPIO_INT_EN(bank), bit, 1, 1); in zynq_unmask_gpio_interrupt()
68 RMWREG32(GPIO_INT_STAT(bank), bit, 1, 1); in zynq_unmask_gpio_interrupt()
75 RMWREG32(GPIO_INT_DIS(bank), bit, 1, 1); in zynq_mask_gpio_interrupt()
180 RMWREG32(GPIO_OEN(bank), bit, 1, ((flags & GPIO_OUTPUT) > 0)); in gpio_config()
188 RMWREG32(GPIO_INT_TYPE(bank), bit, 1, ((flags & GPIO_EDGE) > 0)); in gpio_config()
200 RMWREG32(GPIO_INT_ANY(bank), bit, 1, 1); in gpio_config()
202 RMWREG32(GPIO_INT_POLARITY(bank), bit, 1, ((flags & GPIO_RISING) > 0)); in gpio_config()
203 RMWREG32(GPIO_INT_ANY(bank), bit, 1, 0); in gpio_config()
/lk-master/top/include/lk/
A Dreg.h19 #define RMWREG32(addr, startbit, width, val) *REG32(addr) = (*REG32(addr) & ~(((1<<(width)) - 1) <<… macro

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