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/lk-master/external/platform/stm32f4xx/STM32F4xx_StdPeriph_Driver/inc/
A Dstm32f4xx_rcc.h105 #define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI) || \ argument
145 #define IS_RCC_SYSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_SYSCLKSource_HSI) || \ argument
157 #define IS_RCC_SYSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_SYSCLKSource_HSI) || \ argument
271 #define IS_RCC_RTCCLK_SOURCE(SOURCE) (((SOURCE) == RCC_RTCCLKSource_LSE) || \ argument
316 #define IS_RCC_I2SCLK_SOURCE(SOURCE) (((SOURCE) == RCC_I2SCLKSource_PLLI2S) || ((SOURCE) == RCC_I2S… argument
340 #define IS_RCC_SAICLK_SOURCE(SOURCE) (((SOURCE) == RCC_SAICLKSource_PLLSAI) || ((SOURCE) == RCC_SAI… argument
376 #define IS_RCC_SAIACLK_SOURCE(SOURCE) (((SOURCE) == RCC_SAIACLKSource_PLLI2S) ||\ argument
390 #define IS_RCC_SAIBCLK_SOURCE(SOURCE) (((SOURCE) == RCC_SAIBCLKSource_PLLI2S) ||\ argument
464 #define IS_RCC_FMPI2C1_CLOCKSOURCE(SOURCE) (((SOURCE) == RCC_FMPI2C1CLKSource_APB1) || ((SOURCE) ==… argument
650 #define IS_RCC_MCO1SOURCE(SOURCE) (((SOURCE) == RCC_MCO1Source_HSI) || ((SOURCE) == RCC_MCO1Source_… argument
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A Dmisc.h145 #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \ argument
146 ((SOURCE) == SysTick_CLKSource_HCLK_Div8))
A Dstm32f4xx_flash.h290 #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) argument
300 #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NoRST) || ((SOURCE) == OB_STOP_RST)) argument
311 #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NoRST) || ((SOURCE) == OB_STDBY_RST)) argument
A Dstm32f4xx_tim.h678 #define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0x80FF) == 0x0000) && ((SOURCE) != 0x0000… argument
802 #define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFF00) == 0x0000) && ((SOURCE) != 0x00… argument
816 #define IS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) || \ argument
871 #define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) || \ argument
872 ((SOURCE) == TIM_TRGOSource_Enable) || \
873 ((SOURCE) == TIM_TRGOSource_Update) || \
874 ((SOURCE) == TIM_TRGOSource_OC1) || \
875 ((SOURCE) == TIM_TRGOSource_OC1Ref) || \
876 ((SOURCE) == TIM_TRGOSource_OC2Ref) || \
877 ((SOURCE) == TIM_TRGOSource_OC3Ref) || \
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/lk-master/external/platform/stm32f2xx/STM32F2xx_StdPeriph_Driver/inc/
A Dstm32f2xx_rcc.h79 #define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI) || \ argument
80 ((SOURCE) == RCC_PLLSource_HSE))
98 #define IS_RCC_SYSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_SYSCLKSource_HSI) || \ argument
99 ((SOURCE) == RCC_SYSCLKSource_HSE) || \
100 ((SOURCE) == RCC_SYSCLKSource_PLLCLK))
208 #define IS_RCC_RTCCLK_SOURCE(SOURCE) (((SOURCE) == RCC_RTCCLKSource_LSE) || \ argument
250 #define IS_RCC_I2SCLK_SOURCE(SOURCE) (((SOURCE) == RCC_I2S2CLKSource_PLLI2S) || ((SOURCE) == RCC_I2… argument
375 #define IS_RCC_MCO1SOURCE(SOURCE) (((SOURCE) == RCC_MCO1Source_HSI) || ((SOURCE) == RCC_MCO1Source_… argument
376 … ((SOURCE) == RCC_MCO1Source_HSE) || ((SOURCE) == RCC_MCO1Source_PLLCLK))
397 #define IS_RCC_MCO2SOURCE(SOURCE) (((SOURCE) == RCC_MCO2Source_SYSCLK) || ((SOURCE) == RCC_MCO2Sour… argument
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A Dstm32f2xx_flash.h178 #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) argument
188 #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NoRST) || ((SOURCE) == OB_STOP_RST)) argument
199 #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NoRST) || ((SOURCE) == OB_STDBY_RST)) argument
A Dmisc.h145 #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \ argument
146 ((SOURCE) == SysTick_CLKSource_HCLK_Div8))
A Dstm32f2xx_tim.h678 #define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0x80FF) == 0x0000) && ((SOURCE) != 0x0000… argument
802 #define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFF00) == 0x0000) && ((SOURCE) != 0x00… argument
816 #define IS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) || \ argument
871 #define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) || \ argument
872 ((SOURCE) == TIM_TRGOSource_Enable) || \
873 ((SOURCE) == TIM_TRGOSource_Update) || \
874 ((SOURCE) == TIM_TRGOSource_OC1) || \
875 ((SOURCE) == TIM_TRGOSource_OC1Ref) || \
876 ((SOURCE) == TIM_TRGOSource_OC2Ref) || \
877 ((SOURCE) == TIM_TRGOSource_OC3Ref) || \
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/lk-master/external/platform/stm32f7xx/STM32F7xx_HAL_Driver/Inc/
A Dstm32f7xx_hal_rcc.h1217 #define IS_RCC_PLLSOURCE(SOURCE) (((SOURCE) == RCC_PLLSOURCE_HSI) || \ argument
1220 #define IS_RCC_SYSCLKSOURCE(SOURCE) (((SOURCE) == RCC_SYSCLKSOURCE_HSI) || \ argument
1246 #define IS_RCC_MCO1SOURCE(SOURCE) (((SOURCE) == RCC_MCO1SOURCE_HSI) || ((SOURCE) == RCC_MCO1SOURCE_… argument
1247 … ((SOURCE) == RCC_MCO1SOURCE_HSE) || ((SOURCE) == RCC_MCO1SOURCE_PLLCLK))
1249 #define IS_RCC_MCO2SOURCE(SOURCE) (((SOURCE) == RCC_MCO2SOURCE_SYSCLK) || ((SOURCE) == RCC_MCO2SOUR… argument
1250 … ((SOURCE) == RCC_MCO2SOURCE_HSE) || ((SOURCE) == RCC_MCO2SOURCE_PLLCLK))
1257 #define IS_RCC_RTCCLKSOURCE(SOURCE) (((SOURCE) == RCC_RTCCLKSOURCE_LSE) || ((SOURCE) == RCC_RTCCLKS… argument
1258 … ((SOURCE) == RCC_RTCCLKSOURCE_HSE_DIV2) || ((SOURCE) == RCC_RTCCLKSOURCE_HSE_DIV3) || \
1259 … ((SOURCE) == RCC_RTCCLKSOURCE_HSE_DIV4) || ((SOURCE) == RCC_RTCCLKSOURCE_HSE_DIV5) || \
1260 … ((SOURCE) == RCC_RTCCLKSOURCE_HSE_DIV6) || ((SOURCE) == RCC_RTCCLKSOURCE_HSE_DIV7) || \
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A Dstm32f7xx_hal_flash_ex.h392 #define IS_OB_WWDG_SOURCE(SOURCE) (((SOURCE) == OB_WWDG_SW) || ((SOURCE) == OB_WWDG_HW)) argument
394 #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) argument
396 #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST)) argument
398 #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST)) argument
A Dstm32f7xx_hal_tim_ex.h499 #define IS_TIM_TRGO2_SOURCE(SOURCE) (((SOURCE) == TIM_TRGO2_RESET) || \ argument
500 ((SOURCE) == TIM_TRGO2_ENABLE) || \
501 ((SOURCE) == TIM_TRGO2_UPDATE) || \
502 ((SOURCE) == TIM_TRGO2_OC1) || \
503 ((SOURCE) == TIM_TRGO2_OC1REF) || \
504 ((SOURCE) == TIM_TRGO2_OC2REF) || \
505 ((SOURCE) == TIM_TRGO2_OC3REF) || \
506 ((SOURCE) == TIM_TRGO2_OC3REF) || \
507 ((SOURCE) == TIM_TRGO2_OC4REF) || \
508 ((SOURCE) == TIM_TRGO2_OC5REF) || \
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A Dstm32f7xx_hal_rcc_ex.h2586 #define IS_RCC_I2SCLKSOURCE(SOURCE) (((SOURCE) == RCC_I2SCLKSOURCE_PLLI2S) || \ argument
2588 #define IS_RCC_SAI1CLKSOURCE(SOURCE) (((SOURCE) == RCC_SAI1CLKSOURCE_PLLSAI) || \ argument
2591 #define IS_RCC_SAI2CLKSOURCE(SOURCE) (((SOURCE) == RCC_SAI2CLKSOURCE_PLLSAI) || \ argument
2595 #define IS_RCC_SDMMC1CLKSOURCE(SOURCE) (((SOURCE) == RCC_SDMMC1CLKSOURCE_SYSCLK) || \ argument
2598 #define IS_RCC_CECCLKSOURCE(SOURCE) (((SOURCE) == RCC_CECCLKSOURCE_HSI) || \ argument
2617 #define IS_RCC_UART4CLKSOURCE(SOURCE) \ argument
2623 #define IS_RCC_UART5CLKSOURCE(SOURCE) \ argument
2635 #define IS_RCC_UART7CLKSOURCE(SOURCE) \ argument
2641 #define IS_RCC_UART8CLKSOURCE(SOURCE) \ argument
2663 #define IS_RCC_LPTIM1CLK(SOURCE) \ argument
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A Dstm32f7xx_hal_cortex.h354 #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SYSTICK_CLKSOURCE_HCLK) || \ argument
355 ((SOURCE) == SYSTICK_CLKSOURCE_HCLK_DIV8))
A Dstm32f7xx_hal_sai.h775 #define IS_SAI_CLK_SOURCE(SOURCE) (((SOURCE) == SAI_CLKSOURCE_PLLSAI) ||\ argument
776 ((SOURCE) == SAI_CLKSOURCE_PLLI2S) ||\
777 ((SOURCE) == SAI_CLKSOURCE_EXT))
/lk-master/external/platform/stm32f0xx/STM32F0xx_HAL_Driver/inc/
A Dstm32f0xx_hal_rcc_ex.h67 #define IS_RCC_SYSCLKSOURCE(SOURCE) (((SOURCE) == RCC_SYSCLKSOURCE_HSI) || \ argument
77 #define IS_RCC_PLLSOURCE(SOURCE) (((SOURCE) == RCC_PLLSOURCE_HSI) || \ argument
91 #define IS_RCC_SYSCLKSOURCE(SOURCE) (((SOURCE) == RCC_SYSCLKSOURCE_HSI) || \
98 #define IS_RCC_PLLSOURCE(SOURCE) (((SOURCE) == RCC_PLLSOURCE_HSI) || \
105 #define IS_RCC_MCO1SOURCE(SOURCE) (((SOURCE) == RCC_MCO1SOURCE_NOCLOCK) || \ argument
117 #define IS_RCC_MCO1SOURCE(SOURCE) (((SOURCE) == RCC_MCO1SOURCE_NOCLOCK) || \
130 #define IS_RCC_MCO1SOURCE(SOURCE) (((SOURCE) == RCC_MCO1SOURCE_NOCLOCK) || \
311 #define IS_RCC_USBCLKSOURCE(SOURCE) (((SOURCE) == RCC_USBCLKSOURCE_HSI48) || \ argument
318 #define IS_RCC_USBCLKSOURCE(SOURCE) (((SOURCE) == RCC_USBCLKSOURCE_NONE) || \ argument
326 #define IS_RCC_USART2CLKSOURCE(SOURCE) (((SOURCE) == RCC_USART2CLKSOURCE_PCLK1) || \ argument
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A Dstm32f0xx_hal_flash_ex.h72 #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) argument
74 #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST)) argument
76 #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST)) argument
A Dstm32f0xx_hal_tim_ex.h167 #define IS_TIM_CLEARINPUT_SOURCE(SOURCE) (((SOURCE) == TIM_CLEARINPUTSOURCE_NONE) || \ argument
168 ((SOURCE) == TIM_CLEARINPUTSOURCE_ETR) || \
169 ((SOURCE) == TIM_CLEARINPUTSOURCE_OCREFCLR))
171 #define IS_TIM_CLEARINPUT_SOURCE(SOURCE) (((SOURCE) == TIM_CLEARINPUTSOURCE_NONE) || \ argument
172 ((SOURCE) == TIM_CLEARINPUTSOURCE_ETR))
A Dstm32f0xx_hal_cortex.h127 #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SYSTICK_CLKSOURCE_HCLK) || \ argument
128 ((SOURCE) == SYSTICK_CLKSOURCE_HCLK_DIV8))
A Dstm32f0xx_hal_tim.h935 #define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & 0xFFFF80FFU) == 0x00000000U) && ((SOURCE) != 0x0000… argument
937 #define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & 0xFFFFFF00U) == 0x00000000U) && ((SOURCE) != 0x00… argument
1006 #define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGO_RESET) || \ argument
1007 ((SOURCE) == TIM_TRGO_ENABLE) || \
1008 ((SOURCE) == TIM_TRGO_UPDATE) || \
1009 ((SOURCE) == TIM_TRGO_OC1) || \
1010 ((SOURCE) == TIM_TRGO_OC1REF) || \
1011 ((SOURCE) == TIM_TRGO_OC2REF) || \
1012 ((SOURCE) == TIM_TRGO_OC3REF) || \
1013 ((SOURCE) == TIM_TRGO_OC4REF))
/lk-master/external/platform/stm32f1xx/STM32F10x_StdPeriph_Driver/inc/
A Dstm32f10x_rcc.h85 #define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI_Div2) || \ argument
90 #define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI_Div2) || \ argument
91 ((SOURCE) == RCC_PLLSource_PREDIV1))
187 #define IS_RCC_PREDIV1_SOURCE(SOURCE) (((SOURCE) == RCC_PREDIV1_Source_HSE) || \ argument
193 #define IS_RCC_PREDIV1_SOURCE(SOURCE) (((SOURCE) == RCC_PREDIV1_Source_HSE)) argument
291 #define IS_RCC_SYSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_SYSCLKSource_HSI) || \ argument
377 #define IS_RCC_USBCLK_SOURCE(SOURCE) (((SOURCE) == RCC_USBCLKSource_PLLCLK_1Div5) || \ argument
389 #define IS_RCC_OTGFSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_OTGFSCLKSource_PLLVCO_Div3) || \ argument
404 #define IS_RCC_I2S2CLK_SOURCE(SOURCE) (((SOURCE) == RCC_I2S2CLKSource_SYSCLK) || \ argument
416 #define IS_RCC_I2S3CLK_SOURCE(SOURCE) (((SOURCE) == RCC_I2S3CLKSource_SYSCLK) || \ argument
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A Dstm32f10x_flash.h229 #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) argument
241 #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NoRST) || ((SOURCE) == OB_STOP_RST)) argument
253 #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NoRST) || ((SOURCE) == OB_STDBY_RST)) argument
A Dstm32f10x_tim.h723 #define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0x80FF) == 0x0000) && ((SOURCE) != 0x0000… argument
780 #define IS_TIM_TIXCLK_SOURCE(SOURCE) (((SOURCE) == TIM_TIxExternalCLK1Source_TI1) || \ argument
849 #define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFF00) == 0x0000) && ((SOURCE) != 0x00… argument
863 #define IS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) || \ argument
918 #define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) || \ argument
919 ((SOURCE) == TIM_TRGOSource_Enable) || \
920 ((SOURCE) == TIM_TRGOSource_Update) || \
921 ((SOURCE) == TIM_TRGOSource_OC1) || \
922 ((SOURCE) == TIM_TRGOSource_OC1Ref) || \
923 ((SOURCE) == TIM_TRGOSource_OC2Ref) || \
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A Dstm32f10x_bkp.h73 #define IS_BKP_RTC_OUTPUT_SOURCE(SOURCE) (((SOURCE) == BKP_RTCOutputSource_None) || \ argument
74 ((SOURCE) == BKP_RTCOutputSource_CalibClock) || \
75 ((SOURCE) == BKP_RTCOutputSource_Alarm) || \
76 ((SOURCE) == BKP_RTCOutputSource_Second))
A Dmisc.h173 #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \ argument
174 ((SOURCE) == SysTick_CLKSource_HCLK_Div8))

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