/lk-master/platform/stm32f7xx/patch/ |
A D | qspi_const.patch | 27 …I_MemoryMapped(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_MemoryMappedTypeDef *cfg); 74 (cfg->MatchMode | QSPI_AUTOMATIC_STOP_ENABLE)); 81 + // cfg->StatusBytesSize prior to calling this function. 83 + // cmd->NbData = cfg->StatusBytesSize; 88 - cmd->NbData = cfg->StatusBytesSize; 96 …I_AutoPolling_IT(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg) 103 (cfg->MatchMode | cfg->AutomaticStop)); 110 + // cfg->StatusBytesSize prior to calling this function. 112 + // cmd->NbData = cfg->StatusBytesSize; 117 - cmd->NbData = cfg->StatusBytesSize; [all …]
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/lk-master/platform/lpc43xx/ |
A D | init.c | 24 unsigned cfg; in platform_early_init() local 50 cfg = PLL1_CTRL_NSEL_2 | PLL1_CTRL_PSEL_1 | PLL1_CTRL_MSEL(32) | in platform_early_init() 52 writel(cfg, PLL1_CTRL); in platform_early_init() 62 writel(cfg | PLL1_CTRL_DIRECT, PLL1_CTRL); in platform_early_init() 68 cfg = PLL0_CTRL_CLK_SEL(CLK_XTAL) | PLL0_CTRL_DIRECTO | PLL0_CTRL_AUTOBLOCK; in platform_early_init() 69 writel(cfg, PLL0USB_CTRL); in platform_early_init() 72 writel(cfg | PLL0_CTRL_CLKEN, PLL0USB_CTRL); in platform_early_init()
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A D | udc.c | 93 unsigned cfg; in _udc_endpoint_alloc() local 103 cfg = DQH_CFG_MAXPKT(max_pkt) | DQH_CFG_ZLT; in _udc_endpoint_alloc() 110 cfg |= DQH_CFG_IOS; in _udc_endpoint_alloc() 115 ept->head->config = cfg; in _udc_endpoint_alloc()
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/lk-master/platform/zynq/ |
A D | qspi.c | 109 qspi->cfg &= ~CFG_BAUD_MASK; in qspi_set_speed() 110 qspi->cfg |= n; in qspi_set_speed() 112 writel(qspi->cfg, QSPI_CONFIG); in qspi_set_speed() 126 qspi->cfg = (readl(QSPI_CONFIG) & CFG_NO_MODIFY_MASK) | in qspi_init() 135 writel(qspi->cfg, QSPI_CONFIG); in qspi_init() 157 writel(qspi->cfg, QSPI_CONFIG); in qspi_enable_linear() 198 writel(qspi->cfg, QSPI_CONFIG); in qspi_disable_linear() 214 qspi->cfg &= ~(CFG_MANUAL_CS); in qspi_cs() 216 qspi->cfg |= CFG_MANUAL_CS; in qspi_cs() 217 writel(qspi->cfg, QSPI_CONFIG); in qspi_cs() [all …]
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A D | platform.c | 65 const zynq_pll_cfg_tree_t *cfg = &zynq_pll_cfg; in zynq_pll_init() local 67 SLCR_REG(ARM_PLL_CFG) = PLL_CFG_LOCK_CNT(cfg->arm.lock_cnt) | PLL_CFG_PLL_CP(cfg->arm.cp) | in zynq_pll_init() 68 PLL_CFG_PLL_RES(cfg->arm.res); in zynq_pll_init() 69 SLCR_REG(ARM_PLL_CTRL) = PLL_FDIV(cfg->arm.fdiv) | PLL_BYPASS_FORCE | PLL_RESET; in zynq_pll_init() 80 SLCR_REG(DDR_PLL_CFG) = PLL_CFG_LOCK_CNT(cfg->ddr.lock_cnt) | PLL_CFG_PLL_CP(cfg->ddr.cp) | in zynq_pll_init() 81 PLL_CFG_PLL_RES(cfg->ddr.res); in zynq_pll_init() 82 SLCR_REG(DDR_PLL_CTRL) = PLL_FDIV(cfg->ddr.fdiv) | PLL_BYPASS_FORCE | PLL_RESET; in zynq_pll_init() 96 SLCR_REG(IO_PLL_CFG) = PLL_CFG_LOCK_CNT(cfg->io.lock_cnt) | PLL_CFG_PLL_CP(cfg->io.cp) | in zynq_pll_init() 97 PLL_CFG_PLL_RES(cfg->io.res); in zynq_pll_init() 98 SLCR_REG(IO_PLL_CTRL) = PLL_FDIV(cfg->io.fdiv) | PLL_BYPASS_FORCE | PLL_RESET; in zynq_pll_init()
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/lk-master/scripts/ |
A D | do-dartuinoP0-test | 6 openocd -f interface/stlink-v2.cfg -f board/stm32756g_eval.cfg \
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A D | do-stm32f7-disco-test | 8 openocd -f interface/stlink.cfg -f board/stm327x6g_eval.cfg \
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A D | do-stm32f4-disco-test | 6 openocd -f board/stm32f429disc1.cfg \
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A D | do-sifive-e | 16 ${OPENOCD_DIR}/openocd -f ${SDK_DIR}/bsp/sifive-hifive1/openocd.cfg &
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/lk-master/platform/stm32f0xx/ |
A D | exti.c | 144 uint32_t cfg = SYSCFG->EXTICR[interrupt >> 2]; in stm32_setup_ext_interrupt() local 146 cfg &= SYSCFG_EXTICR1_EXTI0 << shift; in stm32_setup_ext_interrupt() 147 cfg |= port << shift; in stm32_setup_ext_interrupt() 148 SYSCFG->EXTICR[interrupt >> 2] = cfg; in stm32_setup_ext_interrupt()
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/lk-master/external/platform/lpc15xx/lpcopen/lpc_chip_15xx/inc/usbd/ |
A D | usbd_hw.h | 159 void (*ForceFullSpeed )(USBD_HANDLE_T hUsb, uint32_t cfg); 178 void (*WakeUpCfg)(USBD_HANDLE_T hUsb, uint32_t cfg); 211 void (*Configure)(USBD_HANDLE_T hUsb, uint32_t cfg); 431 extern void hwUSB_WakeUpCfg(USBD_HANDLE_T hUsb, uint32_t cfg); 433 extern void hwUSB_Configure(USBD_HANDLE_T hUsb, uint32_t cfg);
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/lk-master/external/platform/stm32f7xx/STM32F7xx_HAL_Driver/Src/ |
A D | stm32f7xx_hal_qspi.c | 1108 assert_param(IS_QSPI_INTERVAL(cfg->Interval)); in HAL_QSPI_AutoPolling() 1110 assert_param(IS_QSPI_MATCH_MODE(cfg->MatchMode)); in HAL_QSPI_AutoPolling() 1127 WRITE_REG(hqspi->Instance->PSMAR, cfg->Match); in HAL_QSPI_AutoPolling() 1130 WRITE_REG(hqspi->Instance->PSMKR, cfg->Mask); in HAL_QSPI_AutoPolling() 1133 WRITE_REG(hqspi->Instance->PIR, cfg->Interval); in HAL_QSPI_AutoPolling() 1209 assert_param(IS_QSPI_INTERVAL(cfg->Interval)); in HAL_QSPI_AutoPolling_IT() 1211 assert_param(IS_QSPI_MATCH_MODE(cfg->MatchMode)); in HAL_QSPI_AutoPolling_IT() 1228 WRITE_REG(hqspi->Instance->PSMAR, cfg->Match); in HAL_QSPI_AutoPolling_IT() 1231 WRITE_REG(hqspi->Instance->PSMKR, cfg->Mask); in HAL_QSPI_AutoPolling_IT() 1234 WRITE_REG(hqspi->Instance->PIR, cfg->Interval); in HAL_QSPI_AutoPolling_IT() [all …]
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A D | stm32f7xx_ll_usb.c | 101 if (cfg.phy_itface == USB_OTG_ULPI_PHY) { in USB_CoreInit() 110 if (cfg.use_external_vbus == 1) { in USB_CoreInit() 127 if (cfg.dma_enable == ENABLE) { in USB_CoreInit() 199 if (cfg.vbus_sensing_enable == 0) { in USB_DevInit() 238 for (i = 0; i < cfg.dev_endpoints; i++) { in USB_DevInit() 249 for (i = 0; i < cfg.dev_endpoints; i++) { in USB_DevInit() 262 if (cfg.dma_enable == 1) { in USB_DevInit() 277 if (cfg.dma_enable == DISABLE) { in USB_DevInit() 287 if (cfg.Sof_enable) { in USB_DevInit() 291 if (cfg.vbus_sensing_enable == ENABLE) { in USB_DevInit() [all …]
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/lk-master/external/platform/lpc15xx/lpcopen/periph_uart_rom_polling/example/src/ |
A D | uart_rom_polling.c | 87 UART_CONFIG_T cfg = { in setupUART() local 115 cfg.sys_clk_in_hz = Chip_Clock_GetSystemClockRate(); in setupUART() 118 errCode = LPC_UARTD_API->uart_init(uartHandle, &cfg); in setupUART()
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/lk-master/external/platform/lpc15xx/lpcopen/periph_uart_rom_int/example/src/ |
A D | uart_rom_int.c | 91 UART_CONFIG_T cfg = { in setupUART() local 119 cfg.sys_clk_in_hz = Chip_Clock_GetSystemClockRate(); in setupUART() 122 ret_value = LPC_UARTD_API->uart_init(uartHandle, &cfg); in setupUART()
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/lk-master/tools/moot/ |
A D | mtldr | 90 for cfg in device: 92 cfg, bInterfaceClass=self._device_class, 297 cfg = dev.get_active_configuration() 299 cfg, bInterfaceClass=CLASS_VENDOR_SPECIFIC,
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/lk-master/dev/include/dev/ |
A D | fbcon.h | 44 void fbcon_setup(struct fbcon_config *cfg);
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/lk-master/external/platform/lpc15xx/lpcopen/lpc_chip_15xx/inc/ |
A D | dma_15xx.h | 536 STATIC INLINE void Chip_DMA_SetupChannelConfig(LPC_DMA_T *pDMA, DMA_CHID_T ch, uint32_t cfg) in Chip_DMA_SetupChannelConfig() argument 538 pDMA->DMACH[ch].CFG = cfg; in Chip_DMA_SetupChannelConfig() 593 STATIC INLINE void Chip_DMA_SetupChannelTransfer(LPC_DMA_T *pDMA, DMA_CHID_T ch, uint32_t cfg) in Chip_DMA_SetupChannelTransfer() argument 595 pDMA->DMACH[ch].XFERCFG = cfg; in Chip_DMA_SetupChannelTransfer()
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/lk-master/platform/zynq/include/dev/ |
A D | qspi.h | 16 uint32_t cfg; member
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/lk-master/external/platform/stm32f7xx/STM32F7xx_HAL_Driver/Inc/ |
A D | stm32f7xx_hal_qspi.h | 548 …dleTypeDef *hqspi, const QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg, uint32_t Timeout); 549 …olling_IT(QSPI_HandleTypeDef *hqspi, const QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg); 552 …ryMapped(QSPI_HandleTypeDef *hqspi, const QSPI_CommandTypeDef *cmd, QSPI_MemoryMappedTypeDef *cfg);
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A D | stm32f7xx_ll_usb.h | 425 HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg);
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