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Searched refs:div (Results 1 – 21 of 21) sorted by relevance

/lk-master/app/mdebug/
A Dswd-sgpio.c331 unsigned div = sgpio_div; in swd_reset() local
332 sgpio_swd_clock_setup(div); in swd_reset()
333 sgpio_swd_reset(div); in swd_reset()
337 unsigned div = sgpio_div; in swd_read() local
338 sgpio_swd_clock_setup(div); in swd_read()
343 unsigned div = sgpio_div; in swd_write() local
344 sgpio_swd_clock_setup(div); in swd_write()
349 unsigned div; in swd_set_clock() local
352 div = 192000 / khz; in swd_set_clock()
353 sgpio_div = div - 1; in swd_set_clock()
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A Dswo-uart1.c122 uint32_t div = __lpc43xx_main_clock_mhz / 16 / mhz; in swo_config() local
125 writel(div & 0xFF, UART_BASE + REG_DLL); in swo_config()
126 writel((div >> 8) & 0xFF, UART_BASE + REG_DLM); in swo_config()
/lk-master/external/platform/lpc15xx/lpcopen/lpc_chip_15xx/src/
A Dclock_15xx.c271 LPC_SYSCTL->CLKOUTDIV = div; in Chip_Clock_SetCLKOUTSource()
303 uint32_t sysRate, div; in Chip_Clock_GetSysTickClockRate() local
305 div = Chip_Clock_GetSysTickClockDiv(); in Chip_Clock_GetSysTickClockRate()
308 if (div == 0) { in Chip_Clock_GetSysTickClockRate()
322 uint32_t div; in Chip_Clock_GetUARTBaseClockRate() local
325 if (div == 0) { in Chip_Clock_GetUARTBaseClockRate()
351 uint32_t div, inclk; in Chip_Clock_SetUARTBaseClockRate() local
357 div = inclk / rate; in Chip_Clock_SetUARTBaseClockRate()
358 if (div == 0) { in Chip_Clock_SetUARTBaseClockRate()
359 div = 1; in Chip_Clock_SetUARTBaseClockRate()
[all …]
A Dadc_15xx.c140 uint32_t div; in Chip_ADC_SetClockRate() local
145 div = Chip_Clock_GetSystemClockRate() / rate; in Chip_ADC_SetClockRate()
146 if (div == 0) { in Chip_ADC_SetClockRate()
147 div = 1; in Chip_ADC_SetClockRate()
150 Chip_ADC_SetDivider(pADC, (uint8_t) div - 1); in Chip_ADC_SetClockRate()
/lk-master/external/platform/lpc15xx/lpcopen/lpc_chip_15xx/inc/
A Dclock_15xx.h197 LPC_SYSCTL->USBCLKDIV = div; in Chip_Clock_SetUSBClockSource()
426 STATIC INLINE void Chip_Clock_SetSysClockDiv(uint32_t div) in Chip_Clock_SetSysClockDiv() argument
428 LPC_SYSCTL->SYSAHBCLKDIV = div; in Chip_Clock_SetSysClockDiv()
500 STATIC INLINE void Chip_Clock_SetSysTickClockDiv(uint32_t div) in Chip_Clock_SetSysTickClockDiv() argument
502 LPC_SYSCTL->SYSTICKCLKDIV = div; in Chip_Clock_SetSysTickClockDiv()
526 STATIC INLINE void Chip_Clock_SetIOCONFiltClockDiv(uint32_t div) in Chip_Clock_SetIOCONFiltClockDiv() argument
528 LPC_SYSCTL->IOCONCLKDIV = div; in Chip_Clock_SetIOCONFiltClockDiv()
546 STATIC INLINE void Chip_Clock_SetADCASYNCClockDiv(uint32_t div) in Chip_Clock_SetADCASYNCClockDiv() argument
548 LPC_SYSCTL->ADCASYNCCLKDIV = div; in Chip_Clock_SetADCASYNCClockDiv()
590 STATIC INLINE void Chip_Clock_SetUARTFRGDivider(uint8_t div) in Chip_Clock_SetUARTFRGDivider() argument
[all …]
A Diocon_15xx.h85 #define IOCON_CLKDIV(div) ((div) << 13) /*!< Select peripheral clock divider for input filter… argument
A Dacmp_15xx.h421 STATIC INLINE void Chip_ACMP_SetClockDiv(LPC_CMP_T *pACMP, uint8_t index, CHIP_ACMP_CLKDIV_T div) in Chip_ACMP_SetClockDiv() argument
423 pACMP->ACMP[index].CMPFILTR = (pACMP->ACMP[index].CMPFILTR & ~ACMP_CLKDIV_MASK) | (uint32_t) div; in Chip_ACMP_SetClockDiv()
437 CHIP_ACMP_CLKDIV_T div) in Chip_ACMP_SetCompFiltReg() argument
439 pACMP->ACMP[index].CMPFILTR = (uint32_t) mode | (uint32_t) div; in Chip_ACMP_SetCompFiltReg()
A Dadc_15xx.h237 STATIC INLINE void Chip_ADC_SetDivider(LPC_ADC_T *pADC, uint8_t div) in Chip_ADC_SetDivider() argument
242 pADC->CTRL = temp | (uint32_t) div; in Chip_ADC_SetDivider()
/lk-master/external/platform/pico/rp2_common/hardware_clocks/
A Dclocks.c44 uint32_t div; in clock_configure() local
52 div = (uint32_t) (((uint64_t) src_freq << 8) / freq); in clock_configure()
59 if (div > clock->div) in clock_configure()
60 clock->div = div; in clock_configure()
108 clock->div = div; in clock_configure()
316 void clock_gpio_init(uint gpio, uint src, uint div) { in clock_gpio_init() argument
332 clocks_hw->clk[gpclk].div = div << CLOCKS_CLK_GPOUT0_DIV_INT_LSB; in clock_gpio_init()
/lk-master/external/platform/pico/rp2_common/hardware_pwm/include/hardware/
A Dpwm.h64 uint32_t div; member
114 static inline void pwm_config_set_clkdiv(pwm_config *c, float div) { in pwm_config_set_clkdiv() argument
115 c->div = (uint32_t)(div * (float)(1u << PWM_CH1_DIV_INT_LSB)); in pwm_config_set_clkdiv()
128 static inline void pwm_config_set_clkdiv_int(pwm_config *c, uint div) { in pwm_config_set_clkdiv_int() argument
129 c->div = div << PWM_CH1_DIV_INT_LSB; in pwm_config_set_clkdiv_int()
190 pwm_hw->slice[slice_num].div = c->div; in pwm_init()
347 … pwm_hw->slice[slice_num].div = (integer << PWM_CH0_DIV_INT_LSB) | (fract << PWM_CH0_DIV_FRAC_LSB); in pwm_set_clkdiv_int_frac()
/lk-master/external/platform/nrfx/doc/buildfiles/
A Dextra_stylesheet.css3 div.header
10 body, table, div, p, dl { selector
87 div.levels {
101 div.fragment div.line {
167 div.contents {
173 div.header {
389 div.fig {
396 div.fig span.figcap {
405 div.fig div.imagecenter {
456 div.whichnRF {
/lk-master/platform/lpc43xx/
A Ddebug.c91 uint32_t div = __lpc43xx_main_clock_mhz / 16 / TARGET_DEBUG_BAUDRATE; in lpc43xx_debug_early_init() local
95 writel(div & 0xFF, UART_BASE + REG_DLL); in lpc43xx_debug_early_init()
96 writel((div >> 8) & 0xFF, UART_BASE + REG_DLM); in lpc43xx_debug_early_init()
/lk-master/external/platform/nrfx/drivers/src/
A Dnrfx_clock.c452 nrf_clock_hfclk_div_t div) in nrfx_clock_divider_set() argument
458 switch (div) in nrfx_clock_divider_set()
466 nrf_clock_hfclk_div_set(NRF_CLOCK, div); in nrfx_clock_divider_set()
484 nrf_clock_hfclk_div_set(NRF_CLOCK, div); in nrfx_clock_divider_set()
495 if (div > NRF_CLOCK_HFCLK_DIV_4) in nrfx_clock_divider_set()
501 nrf_clock_hfclk192m_div_set(NRF_CLOCK, div); in nrfx_clock_divider_set()
/lk-master/external/platform/pico/rp2_common/hardware_pio/include/hardware/
A Dpio.h203 static inline void sm_config_set_clkdiv(pio_sm_config *c, float div) { in sm_config_set_clkdiv() argument
204 uint16_t div_int = (uint16_t) div; in sm_config_set_clkdiv()
205 uint8_t div_frac = (uint8_t) ((div - div_int) * (1u << 8u)); in sm_config_set_clkdiv()
877 static inline void pio_sm_set_clkdiv(PIO pio, uint sm, float div) { in pio_sm_set_clkdiv() argument
879 uint16_t div_int = (uint16_t) div; in pio_sm_set_clkdiv()
880 uint8_t div_frac = (uint8_t) ((div - div_int) * (1u << 8u)); in pio_sm_set_clkdiv()
/lk-master/external/platform/pico/rp2040/hardware_structs/include/hardware/structs/
A Drosc.h19 io_rw_32 div; member
A Dadc.h17 io_rw_32 div; member
A Dpwm.h16 io_rw_32 div; member
A Dclocks.h36 io_rw_32 div; member
/lk-master/external/platform/pico/rp2_common/hardware_clocks/include/hardware/
A Dclocks.h177 void clock_gpio_init(uint gpio, uint src, uint div);
/lk-master/external/platform/pico/rp2_common/hardware_adc/include/hardware/
A Dadc.h155 adc_hw->div = (uint32_t)(clkdiv * (float) (1 << ADC_DIV_INT_LSB)); in adc_set_clkdiv()
/lk-master/external/platform/nrfx/drivers/include/
A Dnrfx_clock.h132 nrf_clock_hfclk_div_t div);

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