1 /* 2 * @brief LPC15xx SPI ROM API declarations and functions 3 * 4 * @note 5 * Copyright(C) NXP Semiconductors, 2013 6 * All rights reserved. 7 * 8 * @par 9 * Software that is described herein is for illustrative purposes only 10 * which provides customers with programming information regarding the 11 * LPC products. This software is supplied "AS IS" without any warranties of 12 * any kind, and NXP Semiconductors and its licensor disclaim any and 13 * all warranties, express or implied, including all implied warranties of 14 * merchantability, fitness for a particular purpose and non-infringement of 15 * intellectual property rights. NXP Semiconductors assumes no responsibility 16 * or liability for the use of the software, conveys no license or rights under any 17 * patent, copyright, mask work right, or any other intellectual property rights in 18 * or to any products. NXP Semiconductors reserves the right to make changes 19 * in the software without notification. NXP Semiconductors also makes no 20 * representation or warranty that such application will be suitable for the 21 * specified use without further testing or modification. 22 * 23 * @par 24 * Permission to use, copy, modify, and distribute this software and its 25 * documentation is hereby granted, under NXP Semiconductors' and its 26 * licensor's relevant copyrights in the software, without fee, provided that it 27 * is used in conjunction with NXP Semiconductors microcontrollers. This 28 * copyright, permission, and disclaimer notice must appear in all copies of 29 * this code. 30 */ 31 32 #ifndef __ROM_SPI_15XX_H_ 33 #define __ROM_SPI_15XX_H_ 34 35 #ifdef __cplusplus 36 extern "C" { 37 #endif 38 39 /** @defgroup SPIROM_15XX CHIP: LPC15xx SPI ROM API declarations and functions 40 * @ingroup ROMAPI_15XX 41 * @{ 42 */ 43 44 /** 45 * @brief SPI handle type 46 * The handle to the instance of the SPI driver. Each SPI has one handle, so there can be 47 * several handles for each SPI block. This handle is created by Init API and used by the 48 * transfer functions for the corresponding SPI block. 49 */ 50 typedef void *SPI_HANDLE_T; 51 52 /** 53 * @brief SPI DMA configuration structure 54 */ 55 typedef struct { 56 uint32_t dma_txd_num; /*!< DMA channel number in case DMA mode is enabled. */ 57 uint32_t dma_rxd_num; /*!< In order to do a SPI RX DMA, a SPI TX DMA is also needed to generated clock. */ 58 DMA_HANDLE_T hDMA; /*!< DMA handle */ 59 } SPI_DMA_CFG_T; 60 61 /** 62 * @brief SPI interrupt callback function type 63 * @param err_code: SPI error code 64 * @param n: In interrupt mode, this parameter indicates the number of SPI frames. 65 * In DMA mode, this parameter is always zero. 66 */ 67 typedef void (*SPI_CALLBK_T)(ErrorCode_t err_code, uint32_t n); 68 69 /** 70 * @brief SPI DMA setup callback function type. 71 * To set up the DMA channel, the source address, destination address, DMA transfer 72 * length, DMA request information must be retrieved from the driver structure which has 73 * been originally passed from the ROM_SPI_PARAM_T structure. 74 * @param handle: SPI driver handle 75 * @param dma_cfg: DMA configuration. 76 */ 77 typedef ErrorCode_t (*SPI_DMA_REQ_T)(SPI_HANDLE_T handle, SPI_DMA_CFG_T *dma_cfg); 78 79 /** 80 * @brief SPI configuration structure 81 */ 82 typedef struct { 83 uint32_t delay; /*!< Configures the delay between SSEL and data transfers and between frames. The 84 value is the content of the SPI DLY register. */ 85 uint32_t divider; /*!< Clock divider value DIVVAL in the SPI DIV register. */ 86 uint32_t config; /*!< Enable SPI, configure master/slave, configure signal phase and polarity. The 87 value is the content of the SPI CFG register. */ 88 uint32_t error_en; /*!< Enables the receive overrun and transmit underrun error interrupts. */ 89 } SPI_CONFIG_T; 90 91 /** 92 * @brief SPI configuration parameter structure 93 */ 94 typedef struct { 95 uint16_t *tx_buffer; /*!< Tx buffer */ 96 uint16_t *rx_buffer; /*!< Rx buffer */ 97 uint32_t size; /*!< size of the SPI transfer. A transfer can consist of several transmits of the 98 TXCTLDAT register and of several frames. */ 99 uint32_t fsize_sel; /*!< write the contents of the SPI TXCTL register to select the data length and the 100 slave select lines. In slave mode, you need to only select the data length. */ 101 uint32_t eof_flag; /*!< EOF flag. EOF( end of frame ) is needed if set. EOF delay will not be asserted without this flag. */ 102 uint32_t tx_rx_flag; /*!< Tx & Rx mode flag. 0 is TX only, 1 is RX only, 0x2 is TX and RX */ 103 uint32_t driver_mode; /*!< Driver mode. 104 - 0x00: Polling mode. Function is blocked until transfer is finished. 105 - 0x01: Interrupt mode. Function exits immediately and a call back function is invoked when the transfer has finished 106 - 0x02: DMA mode. Data transferred by SPI is processed by DMA. 107 The DMA_req function is called foe SPI DMA channel set up. 108 The callback function indicates when the transfer is complete. */ 109 SPI_DMA_CFG_T *dma_cfg; /*!< DMA configuration */ 110 SPI_CALLBK_T cb; /*!< SPI interrupt callback function */ 111 SPI_DMA_REQ_T dma_cb; /*!< SPI DMA channel set-up call back function. */ 112 } SPI_PARAM_T; 113 114 /** 115 * @brief SPI ROM API structure 116 * The SPI API handles SPI data transfer in master and slave modes. 117 */ 118 typedef struct { 119 /** Memory size for one SPI instance */ 120 uint32_t (*spi_get_mem_size)(void); 121 /** Set up SPI instance and return handle*/ 122 SPI_HANDLE_T (*spi_setup)(uint32_t base_addr, uint8_t *ram); 123 /** Set up SPI operating mode */ 124 void (*spi_init)(SPI_HANDLE_T handle, SPI_CONFIG_T *set); 125 /** Send or receive data in master mode*/ 126 uint32_t (*spi_master_transfer)(SPI_HANDLE_T handle, SPI_PARAM_T *param); 127 /** Send or receive data in slave mode*/ 128 uint32_t (*spi_slave_transfer)(SPI_HANDLE_T handle, SPI_PARAM_T *param); 129 /** Interrupt service routine */ 130 void (*spi_isr)(SPI_HANDLE_T handle); 131 } SPID_API_T; 132 133 /** 134 * @} 135 */ 136 137 #ifdef __cplusplus 138 } 139 #endif 140 141 #endif /* __ROM_SPI_15XX_H_ */ 142