Searched refs:iobank0_hw (Results 1 – 3 of 3) sorted by relevance
21 return (iobank0_hw->io[gpio].status & IO_BANK0_GPIO0_STATUS_INFROMPAD_BITS) in gpio_get_pad()38 iobank0_hw->io[gpio].ctrl = fn << IO_BANK0_GPIO0_CTRL_FUNCSEL_LSB; in gpio_set_function()44 …return (enum gpio_function) ((iobank0_hw->io[gpio].ctrl & IO_BANK0_GPIO0_CTRL_FUNCSEL_BITS) >> IO_… in gpio_get_function()61 hw_write_masked(&iobank0_hw->io[gpio].ctrl, in gpio_set_inover()69 hw_write_masked(&iobank0_hw->io[gpio].ctrl, in gpio_set_outover()77 hw_write_masked(&iobank0_hw->io[gpio].ctrl, in gpio_set_oeover()85 … &iobank0_hw->proc1_irq_ctrl : &iobank0_hw->proc0_irq_ctrl; in gpio_irq_handler()117 … &iobank0_hw->proc1_irq_ctrl : &iobank0_hw->proc0_irq_ctrl; in gpio_set_irq_enabled()132 io_irq_ctrl_hw_t *irq_ctrl_base = &iobank0_hw->dormant_wake_irq_ctrl; in gpio_set_dormant_irq_enabled()137 iobank0_hw->intr[gpio / 8] = events << 4 * (gpio % 8); in gpio_acknowledge_irq()
93 gpio_ctrl_prev = iobank0_hw->io[dp].ctrl; in hw_enumeration_fix_force_ls_j()102 hw_write_masked(&iobank0_hw->io[dp].ctrl, in hw_enumeration_fix_force_ls_j()142 iobank0_hw->io[dp].ctrl = gpio_ctrl_prev; in hw_enumeration_fix_finish()
33 #define iobank0_hw ((iobank0_hw_t *const)IO_BANK0_BASE) macro
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