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Searched refs:lsr (Results 1 – 6 of 6) sorted by relevance

/lk-master/arch/arm64/include/arch/arm64/
A Dcache_loop.h20 lsr w3, w3, #23
25 add w2, w10, w10, lsr #1 // calculate 3x cache level
26 lsr w1, w0, w2 // extract 3 bit cache type for this level
/lk-master/arch/arm/arm/
A Dstart.S148 lsr r6, #20 /* r6 = physical address / 1MB */
149 lsr r7, #20 /* r7 = virtual address / 1MB */
150 lsr r8, #20 /* r8 = size in 1MB chunks */
206 lsr r6, pc, #20 /* r6 = paddr index */
213 str r7, [r4, r6, lsr #(20 - 2)] /* tt_trampoline[vaddr index] = pt entry */
/lk-master/platform/bcm28xx/
A Dminiuart.c32 uint32_t lsr; member
88 while (!(readl(&regs->lsr) & MU_LSR_TX_EMPTY)) in uart_putc()
/lk-master/arch/arm64/
A Dstart.S165 lsr idx, vaddr, idx_shift
178 lsr tmp, tmp2, idx_shift
184 lsr tmp, size, idx_shift
246 lsr idx, tmp, idx_shift
264 lsr tmp, tmp, #MMU_IDENT_TOP_SHIFT /* tmp = paddr idx */
/lk-master/lib/libc/string/arch/arm/arm/
A Dmemset.S94 sub r2, r2, r3, lsr #28
A Dmemcpy.S139 sub r2, r2, r12, lsr #28

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