Searched refs:riscv_csr_set (Results 1 – 6 of 6) sorted by relevance
79 riscv_csr_set(RISCV_CSR_XIE, RISCV_CSR_XIE_SIE); in riscv_init_percpu()83 riscv_csr_set(RISCV_CSR_XIE, RISCV_CSR_XIE_EIE); in riscv_init_percpu()
35 riscv_csr_set(RISCV_CSR_XIE, RISCV_CSR_XIE_TIE); in platform_set_oneshot_timer()
600 riscv_csr_set(RISCV_CSR_XSTATUS, RISCV_CSR_XSTATUS_SUM); in riscv_mmu_init_secondaries()
17 riscv_csr_set(RISCV_CSR_XSTATUS, RISCV_CSR_XSTATUS_IE); in arch_enable_ints()
59 riscv_csr_set(RISCV_CSR_XSTATUS, old_state); in arch_interrupt_restore()
133 #define riscv_csr_set(csr, bits) \ macro
Completed in 11 milliseconds