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Searched refs:ui32Reg (Results 1 – 10 of 10) sorted by relevance

/lk-master/external/platform/cc13xx/cc13xxware/driverlib/
A Dadi.h167 ASSERT(ui32Reg < ADI_SLAVE_REGS); in ADI8RegWrite()
217 ASSERT(ui32Reg < ADI_SLAVE_REGS); in ADI16RegWrite()
266 ASSERT(ui32Reg < ADI_SLAVE_REGS); in ADI32RegWrite()
306 ASSERT(ui32Reg < ADI_SLAVE_REGS); in ADI8RegRead()
349 ASSERT(ui32Reg < ADI_SLAVE_REGS); in ADI16RegRead()
390 ASSERT(ui32Reg < ADI_SLAVE_REGS); in ADI32RegRead()
441 ASSERT(ui32Reg < ADI_SLAVE_REGS); in ADI8BitsSet()
498 ASSERT(ui32Reg < ADI_SLAVE_REGS); in ADI16BitsSet()
555 ASSERT(ui32Reg < ADI_SLAVE_REGS); in ADI32BitsSet()
612 ASSERT(ui32Reg < ADI_SLAVE_REGS); in ADI8BitsClear()
[all …]
A Dvims.c66 uint32_t ui32Reg; in VIMSConfigure() local
73 ui32Reg = HWREG(ui32Base + VIMS_O_CTL); in VIMSConfigure()
77 ui32Reg |= VIMS_CTL_ARB_CFG; in VIMSConfigure()
81 ui32Reg |= VIMS_CTL_PREF_EN; in VIMSConfigure()
87 HWREG(ui32Base + VIMS_O_CTL) = ui32Reg; in VIMSConfigure()
98 uint32_t ui32Reg; in VIMSModeSet() local
112 ui32Reg = HWREG(ui32Base + VIMS_O_CTL); in VIMSModeSet()
113 ui32Reg &= ~VIMS_CTL_MODE_M; in VIMSModeSet()
116 HWREG(ui32Base + VIMS_O_CTL) = ui32Reg; in VIMSModeSet()
127 uint32_t ui32Reg; in VIMSModeGet() local
[all …]
A Dddi.h235 DDI32RegWrite(uint32_t ui32Base, uint32_t ui32Reg, in DDI32RegWrite() argument
242 ASSERT(ui32Reg < DDI_SLAVE_REGS); in DDI32RegWrite()
247 AuxAdiDdiSafeWrite(ui32Base + ui32Reg, ui32Val, 4); in DDI32RegWrite()
267 DDI32RegRead(uint32_t ui32Base, uint32_t ui32Reg) in DDI32RegRead() argument
273 ASSERT(ui32Reg < DDI_SLAVE_REGS); in DDI32RegRead()
278 return AuxAdiDdiSafeRead(ui32Base + ui32Reg, 4); in DDI32RegRead()
312 ASSERT(ui32Reg < DDI_SLAVE_REGS); in DDI32BitsSet()
344 DDI32BitsClear(uint32_t ui32Base, uint32_t ui32Reg, in DDI32BitsClear() argument
353 ASSERT(ui32Reg < DDI_SLAVE_REGS); in DDI32BitsClear()
404 ASSERT(ui32Reg < DDI_SLAVE_REGS); in DDI8SetValBit()
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A Daon_wuc.c92 uint32_t ui32Reg; in AONWUCRechargeCtrlConfigSet() local
111 ui32Reg = HWREG(AON_WUC_BASE + AON_WUC_O_RECHARGECFG); in AONWUCRechargeCtrlConfigSet()
112 ui32Reg &= ~(AON_WUC_RECHARGECFG_MAX_PER_M_M | AON_WUC_RECHARGECFG_MAX_PER_E_M | in AONWUCRechargeCtrlConfigSet()
163 ui32Reg &= ~(AON_WUC_RECHARGECFG_C1_M | AON_WUC_RECHARGECFG_C2_M); in AONWUCRechargeCtrlConfigSet()
164 ui32Reg |= (ui32C1 << AON_WUC_RECHARGECFG_C1_S) | in AONWUCRechargeCtrlConfigSet()
196 ui32Reg |= ((ui32MaxMantissa << AON_WUC_RECHARGECFG_MAX_PER_M_S) | in AONWUCRechargeCtrlConfigSet()
200 HWREG(AON_WUC_BASE + AON_WUC_O_RECHARGECFG) = ui32Reg; in AONWUCRechargeCtrlConfigSet()
214 uint32_t ui32Reg; in AONWUCOscConfig() local
239 ui32Reg = HWREG(AON_WUC_BASE + AON_WUC_O_RECHARGECFG); in AONWUCOscConfig()
241 ui32Reg |= ((ui32Mantissa << AON_WUC_RECHARGECFG_MAX_PER_M_S) | in AONWUCOscConfig()
[all …]
A Daon_wuc.h228 uint32_t ui32Reg; in AONWUCMcuPowerDownConfig() local
239 ui32Reg = HWREG(AON_WUC_BASE + AON_WUC_O_MCUCLK); in AONWUCMcuPowerDownConfig()
240 ui32Reg &= ~AON_WUC_MCUCLK_PWR_DWN_SRC_M; in AONWUCMcuPowerDownConfig()
241 HWREG(AON_WUC_BASE + AON_WUC_O_MCUCLK) = ui32Reg | in AONWUCMcuPowerDownConfig()
333 uint32_t ui32Reg; in AONWUCMcuSRamConfig() local
345 ui32Reg |= ui32Retention; in AONWUCMcuSRamConfig()
346 HWREG(AON_WUC_BASE + AON_WUC_O_MCUCFG) = ui32Reg; in AONWUCMcuSRamConfig()
402 uint32_t ui32Reg; in AONWUCAuxPowerDownConfig() local
413 ui32Reg = HWREG(AON_WUC_BASE + AON_WUC_O_AUXCLK); in AONWUCAuxPowerDownConfig()
414 ui32Reg &= ~AON_WUC_AUXCLK_PWR_DWN_SRC_M; in AONWUCAuxPowerDownConfig()
[all …]
A Dddi.c64 DDI16BitWrite(uint32_t ui32Base, uint32_t ui32Reg, in DDI16BitWrite() argument
80 ui32RegAddr = ui32Base + (ui32Reg << 1) + DDI_O_MASK16B; in DDI16BitWrite()
108 DDI16BitfieldWrite(uint32_t ui32Base, uint32_t ui32Reg, in DDI16BitfieldWrite() argument
123 ui32RegAddr = ui32Base + (ui32Reg << 1) + DDI_O_MASK16B; in DDI16BitfieldWrite()
152 DDI16BitRead(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask) in DDI16BitRead() argument
165 ui32RegAddr = ui32Base + ui32Reg + DDI_O_DIR; in DDI16BitRead()
198 DDI16BitfieldRead(uint32_t ui32Base, uint32_t ui32Reg, in DDI16BitfieldRead() argument
212 ui32RegAddr = ui32Base + ui32Reg + DDI_O_DIR; in DDI16BitfieldRead()
A Daux_tdc.c96 uint32_t ui32Reg; in AUXTDCMeasurementDone() local
107 ui32Reg = HWREG(ui32Base + AUX_TDC_O_STAT); in AUXTDCMeasurementDone()
108 if(ui32Reg & AUX_TDC_STAT_DONE) in AUXTDCMeasurementDone()
112 else if(ui32Reg & AUX_TDC_STAT_SAT) in AUXTDCMeasurementDone()
A Dioc.c99 uint32_t ui32Reg; in IOCPortConfigureSet() local
110 ui32Reg = IOC_BASE + ( ui32IOId << 2 ); in IOCPortConfigureSet()
126 uint32_t ui32Reg; in IOCPortConfigureGet() local
136 ui32Reg = IOC_BASE + ( ui32IOId << 2 ); in IOCPortConfigureGet()
141 return HWREG(ui32Reg); in IOCPortConfigureGet()
152 uint32_t ui32Reg; in IOCIOShutdownSet() local
166 ui32Reg = IOC_BASE + ( ui32IOId << 2 ); in IOCIOShutdownSet()
171 ui32Config = HWREG(ui32Reg); in IOCIOShutdownSet()
185 uint32_t ui32Reg; in IOCIOModeSet() local
202 ui32Reg = IOC_BASE + ( ui32IOId << 2 ); in IOCIOModeSet()
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A Dprcm.c270 uint32_t ui32Reg; in PRCMAudioClockConfigSet() local
339 ui32Reg = HWREG(PRCM_BASE + PRCM_O_I2SCLKCTL) & ~(PRCM_I2SCLKCTL_WCLK_PHASE_M | in PRCMAudioClockConfigSet()
341 HWREG(PRCM_BASE + PRCM_O_I2SCLKCTL) = ui32Reg | ui32ClkConfig; in PRCMAudioClockConfigSet()
353 uint32_t ui32Reg; in PRCMAudioClockConfigSetOverride() local
384 ui32Reg = HWREG(PRCM_BASE + PRCM_O_I2SCLKCTL) & ~(PRCM_I2SCLKCTL_WCLK_PHASE_M | in PRCMAudioClockConfigSetOverride()
386 HWREG(PRCM_BASE + PRCM_O_I2SCLKCTL) = ui32Reg | ui32ClkConfig; in PRCMAudioClockConfigSetOverride()
A Drom.h356 ((void (*)(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask, uint32_t ui32WrData)) \
360 …((void (*)(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask, uint32_t ui32Shift, uint16_t ui…
364 ((uint16_t (*)(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask)) \
368 ((uint16_t (*)(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask, uint32_t ui32Shift)) \

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