Searched refs:OPENSSL_ia32cap_P (Results 1 – 16 of 16) sorted by relevance
17 extern unsigned int OPENSSL_ia32cap_P[4];113 vec = OPENSSL_ia32_cpuid(OPENSSL_ia32cap_P) & ~mask; in OPENSSL_cpuid_setup()126 vec = OPENSSL_ia32_cpuid(OPENSSL_ia32cap_P); in OPENSSL_cpuid_setup()136 OPENSSL_ia32cap_P[2] &= ~(unsigned int)vecx; in OPENSSL_cpuid_setup()139 OPENSSL_ia32cap_P[2] = (unsigned int)vecx; in OPENSSL_cpuid_setup()143 OPENSSL_ia32cap_P[2] = 0; in OPENSSL_cpuid_setup()144 OPENSSL_ia32cap_P[3] = 0; in OPENSSL_cpuid_setup()147 vec = OPENSSL_ia32_cpuid(OPENSSL_ia32cap_P); in OPENSSL_cpuid_setup()155 OPENSSL_ia32cap_P[0] = (unsigned int)vec | (1 << 10); in OPENSSL_cpuid_setup()156 OPENSSL_ia32cap_P[1] = (unsigned int)(vec >> 32); in OPENSSL_cpuid_setup()[all …]
48 (long long)OPENSSL_ia32cap_P[0] | in DEFINE_RUN_ONCE_STATIC()49 (long long)OPENSSL_ia32cap_P[1] << 32, in DEFINE_RUN_ONCE_STATIC()50 (long long)OPENSSL_ia32cap_P[2] | in DEFINE_RUN_ONCE_STATIC()51 (long long)OPENSSL_ia32cap_P[3] << 32); in DEFINE_RUN_ONCE_STATIC()
93 if ((OPENSSL_ia32cap_P[2] & (1 << 18)) != 0) { in get_hardware_random_value()96 } else if ((OPENSSL_ia32cap_P[1] & (1 << (62 - 32))) != 0) { in get_hardware_random_value()
38 if ((OPENSSL_ia32cap_P[0] & (1 << 4)) != 0) { in ossl_prov_acquire_entropy_from_tsc()
100 int have_rdseed = (OPENSSL_ia32cap_P[2] & (1 << 18)) != 0; in setup_tests()101 int have_rdrand = (OPENSSL_ia32cap_P[1] & (1 << (62 - 32))) != 0; in setup_tests()
134 # define AESNI_CBC_HMAC_SHA_CAPABLE (OPENSSL_ia32cap_P[1]&(1<<(57-32)))145 # define AESNI_CAPABLE (OPENSSL_ia32cap_P[1]&(1<<(57-32)))147 # define VPAES_CAPABLE (OPENSSL_ia32cap_P[1]&(1<<(41-32)))150 # define BSAES_CAPABLE (OPENSSL_ia32cap_P[1]&(1<<(41-32)))
86 if (OPENSSL_ia32cap_P[1] & (1 << (62 - 32))) { in engine_load_rdrand_int()
76 && (OPENSSL_ia32cap_P[0] & (1 << 20)) == 0) { in cipher_hw_rc4_hmac_md5_cipher()122 && (OPENSSL_ia32cap_P[0] & (1 << 20)) == 0) { in cipher_hw_rc4_hmac_md5_cipher()
432 if (((OPENSSL_ia32cap_P[2] & (1 << 29)) || /* SHAEXT? */ in aesni_cbc_hmac_sha256_cipher()433 ((OPENSSL_ia32cap_P[1] & (1 << (60 - 32))) && /* AVX? */ in aesni_cbc_hmac_sha256_cipher()434 ((OPENSSL_ia32cap_P[1] & (1 << (43 - 32))) /* XOP? */ in aesni_cbc_hmac_sha256_cipher()435 | (OPENSSL_ia32cap_P[0] & (1 << 30))))) && /* "Intel CPU"? */ in aesni_cbc_hmac_sha256_cipher()784 if (inp_len >= 8192 && OPENSSL_ia32cap_P[2] & (1 << 5)) in aesni_cbc_hmac_sha256_tls1_multiblock_aad()
732 if (inp_len >= 8192 && OPENSSL_ia32cap_P[2] & (1 << 5)) in aesni_cbc_hmac_sha1_tls1_multiblock_aad()
100 (OPENSSL_ia32cap_P[0] & (1 << 20)) == 0) { in rc4_hmac_md5_cipher()144 (OPENSSL_ia32cap_P[0] & (1 << 20)) == 0) { in rc4_hmac_md5_cipher()
463 if (((OPENSSL_ia32cap_P[2] & (1 << 29)) || /* SHAEXT? */ in aesni_cbc_hmac_sha256_cipher()464 ((OPENSSL_ia32cap_P[1] & (1 << (60 - 32))) && /* AVX? */ in aesni_cbc_hmac_sha256_cipher()465 ((OPENSSL_ia32cap_P[1] & (1 << (43 - 32))) /* XOP? */ in aesni_cbc_hmac_sha256_cipher()466 | (OPENSSL_ia32cap_P[0] & (1 << 30))))) && /* "Intel CPU"? */ in aesni_cbc_hmac_sha256_cipher()846 if (inp_len >= 8192 && OPENSSL_ia32cap_P[2] & (1 << 5)) in aesni_cbc_hmac_sha256_ctrl()934 return ((OPENSSL_ia32cap_P[1] & AESNI_CAPABLE) && in EVP_aes_128_cbc_hmac_sha256()941 return ((OPENSSL_ia32cap_P[1] & AESNI_CAPABLE) && in EVP_aes_256_cbc_hmac_sha256()
862 if (inp_len >= 8192 && OPENSSL_ia32cap_P[2] & (1 << 5)) in aesni_cbc_hmac_sha1_ctrl()950 return (OPENSSL_ia32cap_P[1] & AESNI_CAPABLE ? in EVP_aes_128_cbc_hmac_sha1()956 return (OPENSSL_ia32cap_P[1] & AESNI_CAPABLE ? in EVP_aes_256_cbc_hmac_sha1()
92 extern unsigned int OPENSSL_ia32cap_P[];
738 if (OPENSSL_ia32cap_P[1] & (1 << 1)) { /* check PCLMULQDQ bit */739 if (((OPENSSL_ia32cap_P[1] >> 22) & 0x41) == 0x41) { /* AVX+MOVBE */754 if (OPENSSL_ia32cap_P[0] & (1 << 25)) { /* check SSE bit */756 if (OPENSSL_ia32cap_P[0] & (1 << 23)) { /* check MMX bit */
100 if (!(OPENSSL_ia32cap_P[0] & (1<<23))) break; \
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