Searched refs:AT91_CKGR_MOR (Results 1 – 4 of 4) sorted by relevance
| /optee_os-3.20.0/core/drivers/clk/sam/ |
| A D | at91_main.c | 47 uint32_t mor = io_read32(osc->base + AT91_CKGR_MOR); in pmc_main_rc_osc_enable()
51 io_clrsetbits32(osc->base + AT91_CKGR_MOR, in pmc_main_rc_osc_enable()
65 uint32_t mor = io_read32(osc->base + AT91_CKGR_MOR); in pmc_main_rc_osc_disable()
70 io_clrsetbits32(osc->base + AT91_CKGR_MOR, in pmc_main_rc_osc_disable()
131 uint32_t mor = io_read32(pmc->base + AT91_CKGR_MOR); in pmc_main_osc_enable()
140 io_write32(pmc->base + AT91_CKGR_MOR, mor); in pmc_main_osc_enable()
152 uint32_t mor = io_read32(pmc->base + AT91_CKGR_MOR); in pmc_main_osc_disable()
181 io_clrsetbits32(pmc->base + AT91_CKGR_MOR, in pmc_register_main_osc()
253 tmp = io_read32(pmc->base + AT91_CKGR_MOR); in clk_sam9x5_main_set_parent()
262 io_clrsetbits32(pmc->base + AT91_CKGR_MOR, in clk_sam9x5_main_set_parent()
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| A D | at91_pmc.c | 195 pmc_cache.mor = io_read32(pmc_base + AT91_CKGR_MOR); in pmc_suspend()
242 io_write32(pmc_base + AT91_CKGR_MOR, pmc_cache.mor); in pmc_resume()
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| A D | at91_pmc.h | 65 #define AT91_CKGR_MOR 0x20 macro
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| /optee_os-3.20.0/core/drivers/pm/sam/ |
| A D | pm_suspend.S | 186 ldr tmp1, [pmc, #AT91_CKGR_MOR]
189 str tmp1, [pmc, #AT91_CKGR_MOR]
198 ldr tmp1, [pmc, #AT91_CKGR_MOR]
202 str tmp1, [pmc, #AT91_CKGR_MOR]
229 ldr tmp1, [pmc, #AT91_CKGR_MOR]
233 str tmp1, [pmc, #AT91_CKGR_MOR]
244 str tmp1, [pmc, #AT91_CKGR_MOR]
264 ldr tmp1, [pmc, #AT91_CKGR_MOR]
268 str tmp1, [pmc, #AT91_CKGR_MOR]
280 str tmp1, [pmc, #AT91_CKGR_MOR]
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