CLK_SET_PARENT_GATE (reference) in projects: optee_os-3.20.0

Searched refs:CLK_SET_PARENT_GATE (Results 1 – 7 of 7) sorted by relevance

/optee_os-3.20.0/core/include/drivers/
A D	clk.h	`15 #define CLK_SET_PARENT_GATE BIT(1) /* must be gated across re-parent */ macro`
/optee_os-3.20.0/core/drivers/clk/sam/
A D	at91_usb.c	`105 clk->flags = CLK_SET_RATE_GATE \| CLK_SET_PARENT_GATE; in _at91sam9x5_clk_register_usb()`
A D	at91_audio_pll.c	`346 clk->flags = CLK_SET_RATE_GATE \| CLK_SET_PARENT_GATE; in at91_clk_register_audio_pll_pad() 377 clk->flags = CLK_SET_RATE_GATE \| CLK_SET_PARENT_GATE; in at91_clk_register_audio_pll_pmc()`
A D	at91_programmable.c	`154 clk->flags = CLK_SET_RATE_GATE \| CLK_SET_PARENT_GATE; in at91_clk_register_programmable()`
A D	at91_generated.c	`160 clk->flags = CLK_SET_RATE_GATE \| CLK_SET_PARENT_GATE; in at91_clk_register_generated()`
A D	at91_main.c	`305 clk->flags = CLK_SET_PARENT_GATE; in at91_clk_register_sam9x5_main()`
/optee_os-3.20.0/core/drivers/clk/
A D	clk.c	`293 if (clk->flags & CLK_SET_PARENT_GATE && clk_is_enabled_no_lock(clk)) { in clk_set_parent()`

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