Searched refs:CONTROL_REG (Results 1 – 1 of 1) sorted by relevance
19 #define CONTROL_REG 0x00000000 macro59 io_write32(xiphera_trng_base + CONTROL_REG, HOST_TO_TRNG_READ); in xiphera_trng_read32()60 io_write32(xiphera_trng_base + CONTROL_REG, HOST_TO_TRNG_ENABLE); in xiphera_trng_read32()124 io_write32(xiphera_trng_base + CONTROL_REG, HOST_TO_TRNG_RESET); in xiphera_trng_probe()149 io_write32(xiphera_trng_base + CONTROL_REG, in xiphera_trng_probe()151 io_write32(xiphera_trng_base + CONTROL_REG, HOST_TO_TRNG_ENABLE); in xiphera_trng_probe()152 io_write32(xiphera_trng_base + CONTROL_REG, HOST_TO_TRNG_ZEROIZE); in xiphera_trng_probe()170 io_write32(xiphera_trng_base + CONTROL_REG, HOST_TO_TRNG_ACK_ZEROIZE); in xiphera_trng_probe()
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