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Searched refs:CRU_PLL_CON1 (Results 1 – 2 of 2) sorted by relevance

/optee_os-3.20.0/core/arch/arm/plat-rockchip/
A Dpsci_rk322x.c90 io_write32(va_base + CRU_PLL_CON1(pll), PLL_POWER_DOWN); in pll_power_down()
97 io_write32(va_base + CRU_PLL_CON1(pll), PLL_POWER_UP); in pll_power_up()
105 while (!(io_read32(va_base + CRU_PLL_CON1(pll)) & PLL_LOCK) && in pll_wait_lock()
111 if (!(io_read32(va_base + CRU_PLL_CON1(pll)) & PLL_LOCK)) { in pll_wait_lock()
A Dcru.h40 #define CRU_PLL_CON1(pll) ((pll) * 0x0c + 0x4) macro

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