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Searched refs:DMSG (Results 1 – 25 of 151) sorted by relevance

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/optee_os-3.20.0/core/arch/arm/plat-hikey/
A Dspi_test.c42 DMSG("pl022 done - set CS!"); in spi_cs_callback()
63 DMSG("gpio6 pin2 is SPI"); in spi_set_cs_mux()
65 DMSG("gpio6 pin2 is GPIO"); in spi_set_cs_mux()
80 DMSG("Set CS callback"); in spi_test_with_manual_cs_control()
84 DMSG("Configure SPI"); in spi_test_with_manual_cs_control()
104 DMSG("SPI test loop: %zu", j); in spi_test_with_manual_cs_control()
122 DMSG("SPI test loop: %zu", j); in spi_test_with_manual_cs_control()
169 DMSG("Set CS callback"); in spi_test_with_registered_cs_cb()
174 DMSG("Configure SPI"); in spi_test_with_registered_cs_cb()
219 DMSG("Configure GPIO"); in spi_test_with_builtin_cs_control()
[all …]
A Dmain.c63 DMSG("take SPI0 out of reset\n"); in spi_init()
70 DMSG("PERI_SC_PERIPH_RSTDIS3: 0x%x\n", in spi_init()
80 DMSG("PERI_SC_PERIPH_RSTSTAT3: 0x%x\n", read_val); in spi_init()
82 DMSG("enable SPI clock\n"); in spi_init()
89 DMSG("PERI_SC_PERIPH_CLKEN3: 0x%x\n", in spi_init()
92 DMSG("PERI_SC_PERIPH_CLKSTAT3: 0x%x\n", in spi_init()
104 DMSG("configure gpio6 pins 0-3 as SPI\n"); in spi_init()
110 DMSG("configure gpio6 pins 0-3 as nopull\n"); in spi_init()
127 DMSG("enable LD021_1V8 source (pin 35) on LS connector\n"); in peripherals_init()
/optee_os-3.20.0/core/arch/arm/plat-sunxi/
A Dpsci.c92 DMSG("set entry address for CPU %d", core_idx); in psci_cpu_on()
96 DMSG("assert reset on target CPU %d", core_idx); in psci_cpu_on()
100 DMSG("invalidate L1 cache for CPU %d", core_idx); in psci_cpu_on()
104 DMSG("lock CPU %d", core_idx); in psci_cpu_on()
108 DMSG("release clamp for CPU %d", core_idx); in psci_cpu_on()
117 DMSG("clear power gating for CPU %d", core_idx); in psci_cpu_on()
122 DMSG("de-assert reset on target CPU %d", core_idx); in psci_cpu_on()
126 DMSG("unlock CPU %d", core_idx); in psci_cpu_on()
143 DMSG("core_id: %" PRIu32, core_id); in psci_cpu_off()
153 DMSG("set power gating for cpu %d", core_id); in psci_cpu_off()
[all …]
A Dmain.c109 DMSG("SMTA_DECPORT0=%x", io_read32(v + REG_TZPC_SMTA_DECPORT0_STA_REG)); in tzpc_init()
110 DMSG("SMTA_DECPORT1=%x", io_read32(v + REG_TZPC_SMTA_DECPORT1_STA_REG)); in tzpc_init()
111 DMSG("SMTA_DECPORT2=%x", io_read32(v + REG_TZPC_SMTA_DECPORT2_STA_REG)); in tzpc_init()
118 DMSG("SMTA_DECPORT0=%x", io_read32(v + REG_TZPC_SMTA_DECPORT0_STA_REG)); in tzpc_init()
119 DMSG("SMTA_DECPORT1=%x", io_read32(v + REG_TZPC_SMTA_DECPORT1_STA_REG)); in tzpc_init()
120 DMSG("SMTA_DECPORT2=%x", io_read32(v + REG_TZPC_SMTA_DECPORT2_STA_REG)); in tzpc_init()
/optee_os-3.20.0/core/drivers/
A Dpl022_spi.c363 DMSG("rdat: 0x%x", rdat); in pl022_flush_fifo()
402 DMSG("Pull CS high"); in pl022_configure()
410 DMSG("SPI mode 0"); in pl022_configure()
414 DMSG("SPI mode 1"); in pl022_configure()
418 DMSG("SPI mode 2"); in pl022_configure()
422 DMSG("SPI mode 3"); in pl022_configure()
432 DMSG("Data size: 8"); in pl022_configure()
436 DMSG("Data size: 16"); in pl022_configure()
467 DMSG("Clear interrupts"); in pl022_configure()
479 DMSG("Enable SSP"); in pl022_start()
[all …]
A Dtzc380.c336 DMSG("TZC380 configuration:"); in tzc_dump_state()
337 DMSG("security_inversion_en %x", in tzc_dump_state()
344 DMSG(""); in tzc_dump_state()
345 DMSG("region %d", n); in tzc_dump_state()
348 DMSG("region_base: 0x%08x%08x", temp_32reg_h, temp_32reg); in tzc_dump_state()
350 DMSG("region sp: %x", temp_32reg >> TZC_ATTR_SP_SHIFT); in tzc_dump_state()
351 DMSG("region size: %x", (temp_32reg & TZC_REGION_SIZE_MASK) >> in tzc_dump_state()
354 DMSG("Lockdown select: %"PRIx32, in tzc_dump_state()
356 DMSG("Lockdown range: %"PRIx32, in tzc_dump_state()
358 DMSG("Action register: %"PRIx32, tzc_get_action()); in tzc_dump_state()
[all …]
A Dstm32_i2c.c350 DMSG("CR1: %#"PRIx32, cfg->cr1); in dump_cfg()
351 DMSG("CR2: %#"PRIx32, cfg->cr2); in dump_cfg()
352 DMSG("OAR1: %#"PRIx32, cfg->oar1); in dump_cfg()
353 DMSG("OAR2: %#"PRIx32, cfg->oar2); in dump_cfg()
354 DMSG("TIM: %#"PRIx32, cfg->timingr); in dump_cfg()
425 DMSG("DNF out of bound %"PRId8"/%d", in i2c_compute_timing()
480 DMSG("I2C no Prescaler solution"); in i2c_compute_timing()
536 DMSG("I2C no solution at all"); in i2c_compute_timing()
551 DMSG("I2C TIMINGR: 0x%"PRIx32, *timing); in i2c_compute_timing()
606 DMSG("Null I2C clock rate"); in i2c_setup_timing()
[all …]
A Dls_sfp.c160 DMSG("Set GPIO %"PRIu32" pin %"PRIu32" to HIGH", in ls_sfp_program_fuses()
191 DMSG("Programmed fuse successfully"); in ls_sfp_program_fuses()
194 DMSG("Set GPIO %"PRIu32" pin %"PRIu32" to LOW", in ls_sfp_program_fuses()
283 DMSG("Index greater or equal to ouid: %"PRIu32" >= %zu", in ls_sfp_get_ouid()
319 DMSG("Index greater or equal to srkhr: %"PRIu32" >= %zu", in ls_sfp_get_srkh()
343 DMSG("Debug level has already been fused"); in ls_sfp_set_debug_level()
363 DMSG("SFP is already fused"); in ls_sfp_set_its_wp()
381 DMSG("Index greater or equal to ouid: %"PRIu32" >= %"PRIu32, in ls_sfp_set_ouid()
A Dimx_wdog.c70 DMSG("val %x\n", val); in imx_wdog_restart()
121 DMSG("Wdog found at %u", off); in imx_wdog_base()
130 DMSG("%s not found in DTB", dt_wdog_match_table[i]); in imx_wdog_base()
/optee_os-3.20.0/core/pta/bcm/
A Dbnxt.c82 DMSG("bad parameters types: 0x%" PRIx32, types); in copy_bnxt_crash_dump()
105 DMSG("command entry point[%d] for \"%s\"", cmd_id, BNXT_TA_NAME); in invoke_command()
109 DMSG("bnxt fastboot"); in invoke_command()
114 DMSG("bnxt health status"); in invoke_command()
117 DMSG("bnxt handshake status"); in invoke_command()
120 DMSG("bnxt copy crash dump data"); in invoke_command()
123 DMSG("cmd: %d Not supported %s", cmd_id, BNXT_TA_NAME); in invoke_command()
A Dsotp.c32 DMSG("close entry point for \"%s\"", SOTP_TA_NAME); in close_session()
74 DMSG("command entry point[%d] for \"%s\"", cmd_id, SOTP_TA_NAME); in invoke_command()
77 DMSG("bcm sotp pta access disabled"); in invoke_command()
A Dhwrng.c45 DMSG("Random Value is: 0x%08x", rnd_num); in pta_hwrng_get()
60 DMSG("command entry point[%d] for \"%s\"", cmd_id, HWRNG_TA_NAME); in invoke_command()
/optee_os-3.20.0/core/drivers/scmi-msg/
A Dsmt.c79 DMSG("Invalid channel ID %u", channel_id); in scmi_entry_smt()
85 DMSG("No shared buffer for channel ID %u", channel_id); in scmi_entry_smt()
90 DMSG("SCMI channel %u busy", channel_id); in scmi_entry_smt()
100 DMSG("SCMI payload too big %u", in_payload_size); in scmi_entry_smt()
105 DMSG("SCMI channel bad status 0x%x", in scmi_entry_smt()
135 DMSG("SCMI error"); in scmi_entry_smt()
A Dshm_msg.c53 DMSG("Invalid channel ID %u", channel_id); in scmi_entry_msg()
64 DMSG("Invalid SCMI buffer references %zu@%p / %zu@%p", in scmi_entry_msg()
70 DMSG("SCMI channel %u busy", channel_id); in scmi_entry_msg()
/optee_os-3.20.0/core/kernel/
A Dinitcall.c21 DMSG("level %d %s()", call->level, call->func_name); in call_preinitcalls()
40 DMSG("level %d %s()", call->level, call->func_name); in call_initcalls()
59 DMSG("level %d %s()", call->level, call->func_name); in call_finalcalls()
A Ddt_driver.c131 DMSG("Failed to find provider cells: %d", provider_cells); in dt_driver_register_provider()
140 DMSG("Failed to find provide phandle"); in dt_driver_register_provider()
263 DMSG("Property %s missing in node %s", prop_name, in dt_driver_device_from_node_idx_prop()
309 DMSG("Probe list: %u elements", count); in print_probe_list()
311 DMSG("|- Driver %s probes on node %s", in print_probe_list()
315 DMSG("`- Probe list end"); in print_probe_list()
321 DMSG("Failed list: %u elements", count); in print_probe_list()
326 DMSG("`- Failed list end"); in print_probe_list()
344 DMSG("No probe operator for driver %s, skipped", drv_name); in probe_driver_node()
553 DMSG("element: %s on node %s", node_name, drv_name); in add_node_to_probe()
[all …]
/optee_os-3.20.0/core/arch/arm/plat-vexpress/
A Dmain.c110 DMSG("got 0x%x", ch); in read_console()
139 DMSG("Asynchronous notifications started, event %d", (int)ev); in atomic_console_notif()
152 DMSG("Asynchronous notifications stopped"); in yielding_console_notif()
187 DMSG("TPM2 Chip initialized"); in init_tpm2()
201 DMSG("Initializing TZC400"); in init_tzc400()
250 DMSG("core pos: %zu: ns_entry %#" PRIx32, pos, entry); in psci_cpu_on()
/optee_os-3.20.0/core/arch/arm/plat-imx/pm/
A Dimx7_suspend.c54 DMSG("=== Not suspended, GPC IRQ Pending ===\n"); in imx7_cpu_suspend()
68 DMSG("=== Back from Suspended ===\n"); in imx7_cpu_suspend()
A Dpsci.c104 DMSG("core_id: %" PRIu32, core_id); in psci_cpu_off()
136 DMSG("cpu: %" PRIu32 "GPR: %" PRIx32, cpu, imx_get_src_gpr(cpu)); in psci_affinity_info()
211 DMSG("Not supported %x\n", type); in psci_cpu_suspend()
220 DMSG("ID = %d\n", id); in psci_cpu_suspend()
234 DMSG("ID %d not supported\n", id); in psci_cpu_suspend()
/optee_os-3.20.0/core/tests/
A Dftmn_boot_tests.c191 DMSG("Calling " #x "()"); \
193 DMSG("Return from " #x "()"); \
202 DMSG("*************************************************"); in ftmn_boot_tests()
203 DMSG("************** Tests complete *****************"); in ftmn_boot_tests()
204 DMSG("*************************************************"); in ftmn_boot_tests()
/optee_os-3.20.0/core/pta/tests/
A Dinvoke.c179 …DMSG("expect memref params: %p/%" PRIu32 " - %p/%" PRIu32 "zu - %p/%" PRIu32 "zu - %p/%" PRIu32 "z… in test_entry_params()
261 DMSG("bad parameter types"); in test_inject_sdp()
272 DMSG("bad memref secure attribute"); in test_inject_sdp()
304 DMSG("bad parameter types"); in test_transform_sdp()
309 DMSG("bad memref secure attribute"); in test_transform_sdp()
343 DMSG("bad parameter types"); in test_dump_sdp()
354 DMSG("bad memref secure attribute"); in test_dump_sdp()
382 DMSG("create entry point for pseudo TA \"%s\"", TA_NAME); in create_ta()
388 DMSG("destroy entry point for pseudo ta \"%s\"", TA_NAME); in destroy_ta()
395 DMSG("open entry point for pseudo ta \"%s\"", TA_NAME); in open_session()
[all …]
A Dlockdep.c22 DMSG(""); in self_test_lockdep1()
83 DMSG(""); in self_test_lockdep2()
136 DMSG(""); in self_test_lockdep3()
196 DMSG("count=%d", count); in core_lockdep_tests()
/optee_os-3.20.0/core/arch/arm/plat-marvell/armada3700/
A Dhal_sec_perf.c216 DMSG("Range Num%" PRIu32 in _dump_range()
219 DMSG("AddrL: 0x%08" PRIx32, addr_read); in _dump_range()
220 DMSG("Size: %" PRIu32 "M", (0x1 << sizecode_read)); in _dump_range()
221 DMSG("Perm: %" PRIu32, perm_read); in _dump_range()
251 DMSG("sec-rgn size: ra = 0x%" PRIx32 ", size = 0x%" PRIx64, in init_sec_perf()
/optee_os-3.20.0/core/arch/arm/plat-stm32mp1/pm/
A Dpsci.c60 DMSG("core %zu, state %u", pos, core_state[pos]); in psci_affinity_info()
158 DMSG("core %zu, ns_entry 0x%" PRIx32 ", state %u", in psci_cpu_on()
202 DMSG("core %u", pos); in psci_cpu_off()
224 DMSG("core %u", get_core_pos()); in psci_system_off()
/optee_os-3.20.0/core/arch/arm/plat-rzn1/
A Dpsci.c52 DMSG("core_id: %" PRIu32, core_id); in psci_cpu_on()
65 DMSG("core_id: %" PRIu32, get_core_pos()); in psci_cpu_off()

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