| /optee_os-3.20.0/core/arch/arm/plat-uniphier/ |
| A D | main.c | 29 #ifdef DRAM0_BASE
30 register_ddr(DRAM0_BASE, DRAM0_SIZE);
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| A D | platform_config.h | 49 #define DRAM0_BASE (CFG_DRAM0_BASE + CFG_DRAM0_RSV_SIZE) macro
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| /optee_os-3.20.0/core/arch/arm/plat-zynqmp/ |
| A D | main.c | 74 register_ddr(DRAM0_BASE, 0x80000000);
77 register_ddr(DRAM0_BASE, CFG_DDR_SIZE);
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| A D | platform_config.h | 43 #define DRAM0_BASE 0 macro
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| /optee_os-3.20.0/core/arch/arm/plat-vexpress/ |
| A D | platform_config.h | 90 #define DRAM0_BASE 0x80000000 macro
107 #define DRAM0_BASE 0x80000000 macro
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| A D | main.c | 44 #ifdef DRAM0_BASE
45 register_ddr(DRAM0_BASE, DRAM0_SIZE);
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| /optee_os-3.20.0/core/arch/arm/plat-stm/ |
| A D | platform_config.h | 202 #define DRAM0_BASE (CFG_DDR_START + CFG_STM_RSV_DRAM_STARTBYTES) macro
203 #define DRAM0_SIZE (STM_SECDDR_BASE - DRAM0_BASE)
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| A D | main.c | 29 #ifdef DRAM0_BASE
30 register_ddr(DRAM0_BASE, DRAM0_SIZE);
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| /optee_os-3.20.0/core/arch/arm/plat-rpi3/ |
| A D | platform_config.h | 68 #define DRAM0_BASE 0x00000000 macro
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| /optee_os-3.20.0/core/arch/arm/plat-synquacer/ |
| A D | platform_config.h | 26 #define DRAM0_BASE 0x80000000 macro
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| /optee_os-3.20.0/core/arch/arm/plat-d02/ |
| A D | platform_config.h | 67 #define DRAM0_BASE 0x00000000 macro
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| /optee_os-3.20.0/core/arch/arm/plat-corstone1000/ |
| A D | platform_config.h | 20 #define DRAM0_BASE 0x80000000 macro
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| A D | main.c | 18 register_ddr(DRAM0_BASE, DRAM0_SIZE);
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| /optee_os-3.20.0/core/arch/arm/plat-totalcompute/ |
| A D | platform_config.h | 28 #define DRAM0_BASE 0x80000000 macro
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| A D | main.c | 29 register_ddr(DRAM0_BASE, DRAM0_SIZE);
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| /optee_os-3.20.0/core/arch/arm/plat-versal/ |
| A D | platform_config.h | 33 #define DRAM0_BASE 0 macro
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| A D | main.c | 44 register_ddr(DRAM0_BASE, DRAM0_SIZE);
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| /optee_os-3.20.0/core/arch/arm/plat-sprd/ |
| A D | platform_config.h | 51 #define DRAM0_BASE 0x80000000 macro
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| /optee_os-3.20.0/core/arch/arm/plat-poplar/ |
| A D | platform_config.h | 99 #define DRAM0_BASE 0x00000000 macro
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| /optee_os-3.20.0/core/arch/arm/plat-mediatek/ |
| A D | platform_config.h | 35 #define DRAM0_BASE 0x40000000 macro
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| /optee_os-3.20.0/core/arch/arm/plat-k3/ |
| A D | platform_config.h | 18 #define DRAM0_BASE 0x80000000 macro
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| A D | main.c | 36 register_ddr(DRAM0_BASE, DRAM0_SIZE);
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| /optee_os-3.20.0/core/arch/arm/plat-hikey/ |
| A D | platform_config.h | 107 #define DRAM0_BASE 0x00000000 macro
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| A D | main.c | 36 register_dynamic_shm(DRAM0_BASE, DRAM0_SIZE_NSEC);
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| /optee_os-3.20.0/core/arch/arm/plat-ti/ |
| A D | platform_config.h | 9 #define DRAM0_BASE 0x80000000 macro
|