1 // SPDX-License-Identifier: BSD-2-Clause
2 /*
3 * Copyright (C) 2019, Theobroma Systems Design und Consulting GmbH
4 */
5
6 #include <common.h>
7 #include <io.h>
8 #include <kernel/panic.h>
9 #include <mm/core_memprot.h>
10 #include <platform.h>
11 #include <platform_config.h>
12
13 #define FIREWALL_DDR_FW_DDR_RGN(i) ((i) * 0x4)
14 #define FIREWALL_DDR_FW_DDR_MST(i) (0x20 + (i) * 0x4)
15 #define FIREWALL_DDR_FW_DDR_CON_REG 0x40
16 #define FIREWALL_DDR_FW_DDR_RGN_NUM 8
17 #define FIREWALL_DDR_FW_DDR_MST_NUM 6
18
19 #define RG_MAP_SECURE(top, base) ((((top) - 1) << 16) | (base))
20
21 register_phys_mem_pgdir(MEM_AREA_IO_SEC, FIREWALL_DDR_BASE, FIREWALL_DDR_SIZE);
22
platform_secure_ddr_region(int rgn,paddr_t st,size_t sz)23 int platform_secure_ddr_region(int rgn, paddr_t st, size_t sz)
24 {
25 vaddr_t fw_base = (vaddr_t)phys_to_virt_io(FIREWALL_DDR_BASE,
26 FIREWALL_DDR_SIZE);
27 paddr_t ed = st + sz;
28 uint32_t st_mb = st / SIZE_M(1);
29 uint32_t ed_mb = ed / SIZE_M(1);
30
31 if (!fw_base)
32 panic();
33
34 assert(rgn <= 7);
35 assert(st < ed);
36
37 /* Check aligned 1MB */
38 assert(st % SIZE_M(1) == 0);
39 assert(ed % SIZE_M(1) == 0);
40
41 DMSG("protecting region %d: 0x%lx-0x%lx\n", rgn, st, ed);
42
43 /* Map top and base */
44 io_write32(fw_base + FIREWALL_DDR_FW_DDR_RGN(rgn),
45 RG_MAP_SECURE(ed_mb, st_mb));
46
47 /* Enable secure setting */
48 io_setbits32(fw_base + FIREWALL_DDR_FW_DDR_CON_REG, BIT(rgn));
49
50 return 0;
51 }
52