| /optee_os-3.20.0/core/arch/arm/plat-rockchip/ |
| A D | platform_config.h | 23 #define GICC_BASE (GIC_BASE + 0x2000) macro
50 #define GICC_BASE (MMIO_BASE + 0x07F00000) macro
74 #define GICC_BASE (GIC_BASE + 0x2000) macro
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| A D | main.c | 29 gic_init(&gic_data, GICC_BASE, GICD_BASE); in main_init_gic()
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| /optee_os-3.20.0/core/arch/arm/plat-marvell/ |
| A D | main.c | 72 #ifdef GICC_BASE
73 register_phys_mem_pgdir(MEM_AREA_IO_SEC, GICC_BASE, CORE_MMU_PGDIR_SIZE);
81 #ifdef GICC_BASE in main_init_gic()
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| A D | platform_config.h | 73 #define GICC_BASE (GIC_BASE + GICC_OFFSET) macro
104 #define GICC_BASE (GIC_BASE + GICC_OFFSET) macro
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| /optee_os-3.20.0/core/arch/arm/plat-corstone1000/ |
| A D | main.c | 23 register_phys_mem_pgdir(MEM_AREA_IO_SEC, GICC_BASE, GIC_CPU_REG_SIZE);
27 gic_init_base_addr(&gic_data, GICC_BASE, GICD_BASE); in main_init_gic()
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| A D | platform_config.h | 27 #define GICC_BASE (GIC_BASE + GICC_OFFSET) macro
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| /optee_os-3.20.0/core/arch/arm/plat-rcar/ |
| A D | platform_config.h | 42 #define GICC_BASE 0xF1020000 macro
51 #define GICC_BASE 0xF1060000 macro
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| A D | main.c | 41 register_phys_mem_pgdir(MEM_AREA_IO_SEC, GICC_BASE, GIC_CPU_REG_SIZE);
93 gic_init(&gic_data, GICC_BASE, GICD_BASE); in main_init_gic()
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| /optee_os-3.20.0/core/arch/arm/plat-k3/ |
| A D | main.c | 27 register_phys_mem_pgdir(MEM_AREA_IO_SEC, GICC_BASE, GICC_SIZE);
41 gic_init_base_addr(&gic_data, GICC_BASE, GICD_BASE); in main_init_gic()
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| A D | platform_config.h | 58 #define GICC_BASE (SCU_BASE + GICC_OFFSET) macro
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| /optee_os-3.20.0/core/arch/arm/plat-ti/ |
| A D | platform_config.h | 44 #define GICC_BASE (SCU_BASE + GICC_OFFSET) macro
81 #define GICC_BASE (SCU_BASE + GICC_OFFSET) macro
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| A D | main.c | 34 register_phys_mem_pgdir(MEM_AREA_IO_SEC, GICC_BASE, GICC_SIZE);
41 gic_init(&gic_data, GICC_BASE, GICD_BASE); in main_init_gic()
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| /optee_os-3.20.0/core/arch/arm/plat-rzn1/ |
| A D | platform_config.h | 21 #define GICC_BASE (GIC_BASE + GICC_OFFSET) macro
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| A D | main.c | 47 gic_init(&gic_data, GICC_BASE, GICD_BASE); in main_init_gic()
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| /optee_os-3.20.0/core/arch/arm/plat-totalcompute/ |
| A D | platform_config.h | 43 #define GICC_BASE (GIC_BASE + GICC_OFFSET) macro
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| /optee_os-3.20.0/core/arch/arm/plat-rzg/ |
| A D | platform_config.h | 16 #define GICC_BASE 0xF1020000 macro
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| A D | main.c | 16 register_phys_mem_pgdir(MEM_AREA_IO_SEC, GICC_BASE, GIC_DIST_REG_SIZE);
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| /optee_os-3.20.0/core/arch/arm/plat-vexpress/ |
| A D | platform_config.h | 138 #define GICC_BASE (GIC_BASE + GICC_OFFSET) macro
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| A D | main.c | 54 register_phys_mem_pgdir(MEM_AREA_IO_SEC, GICC_BASE, GIC_DIST_REG_SIZE);
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