| /optee_os-3.20.0/core/arch/arm/plat-ls/ |
| A D | platform_config.h | 45 #define GICC_OFFSET 0x2000 macro
68 #define GICC_OFFSET 0x20000 macro
78 #define GICC_OFFSET 0x0 macro
88 #define GICC_OFFSET 0x0 macro
98 #define GICC_OFFSET 0x0 macro
108 #define GICC_OFFSET 0x0 macro
118 #define GICC_OFFSET 0x0 macro
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| /optee_os-3.20.0/core/arch/arm/plat-mediatek/ |
| A D | platform_config.h | 23 #define GICC_OFFSET 0x2000 macro
41 #define GICC_OFFSET 0x400000 macro
55 #define GICC_OFFSET 0x10000 macro
69 #define GICC_OFFSET 0x400000 macro
83 #define GICC_OFFSET 0x400000 macro
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| A D | main.c | 27 register_phys_mem_pgdir(MEM_AREA_IO_SEC, GIC_BASE + GICC_OFFSET,
32 gic_init_base_addr(&gic_data, GIC_BASE + GICC_OFFSET, in main_init_gic()
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| /optee_os-3.20.0/core/arch/arm/plat-vexpress/ |
| A D | platform_config.h | 99 #define GICC_OFFSET 0x0 macro
113 #define GICC_OFFSET 0x1f000 macro
125 #define GICC_OFFSET 0x10000 macro
130 #define GICC_OFFSET 0x10000 macro
138 #define GICC_BASE (GIC_BASE + GICC_OFFSET)
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| /optee_os-3.20.0/core/arch/arm/plat-marvell/ |
| A D | platform_config.h | 69 #define GICC_OFFSET 0x10000 macro
73 #define GICC_BASE (GIC_BASE + GICC_OFFSET)
99 #define GICC_OFFSET (0x80000) macro
104 #define GICC_BASE (GIC_BASE + GICC_OFFSET)
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| /optee_os-3.20.0/core/arch/arm/plat-ti/ |
| A D | platform_config.h | 40 #define GICC_OFFSET 0x2000 macro
44 #define GICC_BASE (SCU_BASE + GICC_OFFSET)
76 #define GICC_OFFSET 0x0100 macro
81 #define GICC_BASE (SCU_BASE + GICC_OFFSET)
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| /optee_os-3.20.0/core/arch/arm/plat-rzn1/ |
| A D | platform_config.h | 19 #define GICC_OFFSET 0x2000 macro
21 #define GICC_BASE (GIC_BASE + GICC_OFFSET)
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| /optee_os-3.20.0/core/arch/arm/plat-k3/ |
| A D | platform_config.h | 26 #define GICC_OFFSET 0x100000 macro
31 #define GICC_OFFSET 0x80000 macro
58 #define GICC_BASE (SCU_BASE + GICC_OFFSET)
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| /optee_os-3.20.0/core/arch/arm/plat-corstone1000/ |
| A D | platform_config.h | 24 #define GICC_OFFSET 0x2F000 macro
27 #define GICC_BASE (GIC_BASE + GICC_OFFSET)
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| /optee_os-3.20.0/core/arch/arm/plat-totalcompute/ |
| A D | platform_config.h | 20 #define GICC_OFFSET 0x0 macro
43 #define GICC_BASE (GIC_BASE + GICC_OFFSET)
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| A D | main.c | 39 gic_init_base_addr(&gic_data, GIC_BASE + GICC_OFFSET, in main_init_gic()
40 GIC_BASE + GICC_OFFSET); in main_init_gic()
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| /optee_os-3.20.0/core/arch/arm/plat-imx/registers/ |
| A D | imx6.h | 90 #define GICC_OFFSET 0x2000 macro
96 #define GICC_OFFSET 0x100 macro
101 #define GIC_CPU_BASE (GIC_BASE + GICC_OFFSET)
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| A D | imx7ulp.h | 13 #define GICC_OFFSET 0x2000 macro
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| A D | imx7.h | 12 #define GICC_OFFSET 0x2000 macro
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| /optee_os-3.20.0/core/arch/arm/plat-zynqmp/ |
| A D | platform_config.h | 73 #define GICC_OFFSET 0x20000 macro
88 #define GICC_OFFSET 0x20000 macro
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| /optee_os-3.20.0/core/arch/arm/plat-zynq7k/ |
| A D | platform_config.h | 39 #define GICC_OFFSET 0x100 macro
41 #define GIC_CPU_BASE (GIC_BASE + GICC_OFFSET)
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| /optee_os-3.20.0/core/arch/arm/plat-amlogic/ |
| A D | platform_config.h | 15 #define GICC_OFFSET 0x2000 macro
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| /optee_os-3.20.0/core/arch/arm/plat-aspeed/ |
| A D | platform_config.h | 16 #define GICC_OFFSET 0x2000 macro
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| A D | platform_ast2600.c | 48 register_phys_mem(MEM_AREA_IO_SEC, GIC_BASE + GICC_OFFSET, GIC_CPU_REG_SIZE);
66 gic_init(&gic_data, GIC_BASE + GICC_OFFSET, GIC_BASE + GICD_OFFSET); in main_init_gic()
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| /optee_os-3.20.0/core/arch/arm/plat-sunxi/ |
| A D | platform_config.h | 47 #define GICC_OFFSET 0x2000 macro
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| /optee_os-3.20.0/core/arch/arm/plat-uniphier/ |
| A D | platform_config.h | 18 #define GICC_OFFSET 0x80000 macro
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| A D | main.c | 42 gic_init_base_addr(&gic_data, GIC_BASE + GICC_OFFSET, in main_init_gic()
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| /optee_os-3.20.0/core/arch/arm/plat-sprd/ |
| A D | main.c | 53 gic_init_base_addr(&gic_data, GIC_BASE + GICC_OFFSET, in main_init_gic()
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| A D | platform_config.h | 60 #define GICC_OFFSET 0x2000 macro
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| /optee_os-3.20.0/core/arch/arm/plat-versal/ |
| A D | platform_config.h | 45 #define GICC_OFFSET 0x40000 macro
|