/optee_os-3.20.0/core/arch/arm/plat-ls/ |
A D | platform_config.h | 46 #define GICD_OFFSET 0x1000 macro 69 #define GICD_OFFSET 0x10000 macro 79 #define GICD_OFFSET 0x0 macro 89 #define GICD_OFFSET 0x0 macro 99 #define GICD_OFFSET 0x0 macro 109 #define GICD_OFFSET 0x0 macro 119 #define GICD_OFFSET 0x0 macro
|
/optee_os-3.20.0/core/arch/arm/plat-marvell/ |
A D | platform_config.h | 70 #define GICD_OFFSET 0x0 macro 72 #define GICD_BASE (GIC_BASE + GICD_OFFSET) 101 #define GICD_OFFSET (0x0) macro 103 #define GICD_BASE (GIC_BASE + GICD_OFFSET) 120 #define GICD_OFFSET (0x0) macro 122 #define GICD_BASE (GIC_BASE + GICD_OFFSET)
|
/optee_os-3.20.0/core/arch/arm/plat-mediatek/ |
A D | platform_config.h | 24 #define GICD_OFFSET 0x1000 macro 42 #define GICD_OFFSET 0x0 macro 56 #define GICD_OFFSET 0x00000 macro 70 #define GICD_OFFSET 0x0 macro 84 #define GICD_OFFSET 0x0 macro
|
A D | main.c | 25 register_phys_mem_pgdir(MEM_AREA_IO_SEC, GIC_BASE + GICD_OFFSET, 33 GIC_BASE + GICD_OFFSET); in main_init_gic()
|
/optee_os-3.20.0/core/arch/arm/plat-vexpress/ |
A D | platform_config.h | 100 #define GICD_OFFSET 0x3000000 macro 114 #define GICD_OFFSET 0 macro 124 #define GICD_OFFSET 0 macro 129 #define GICD_OFFSET 0 macro 137 #define GICD_BASE (GIC_BASE + GICD_OFFSET)
|
/optee_os-3.20.0/core/arch/arm/plat-ti/ |
A D | platform_config.h | 42 #define GICD_OFFSET 0x1000 macro 45 #define GICD_BASE (SCU_BASE + GICD_OFFSET) 74 #define GICD_OFFSET 0x1000 macro 80 #define GICD_BASE (SCU_BASE + GICD_OFFSET)
|
/optee_os-3.20.0/core/arch/arm/plat-rzn1/ |
A D | platform_config.h | 18 #define GICD_OFFSET 0x1000 macro 20 #define GICD_BASE (GIC_BASE + GICD_OFFSET)
|
/optee_os-3.20.0/core/arch/arm/plat-k3/ |
A D | platform_config.h | 28 #define GICD_OFFSET 0x0 macro 33 #define GICD_OFFSET 0x0 macro 59 #define GICD_BASE (SCU_BASE + GICD_OFFSET)
|
/optee_os-3.20.0/core/arch/arm/plat-corstone1000/ |
A D | platform_config.h | 23 #define GICD_OFFSET 0x10000 macro 26 #define GICD_BASE (GIC_BASE + GICD_OFFSET)
|
/optee_os-3.20.0/core/arch/arm/plat-totalcompute/ |
A D | platform_config.h | 19 #define GICD_OFFSET 0x0 macro 42 #define GICD_BASE (GIC_BASE + GICD_OFFSET)
|
/optee_os-3.20.0/core/arch/arm/plat-sprd/ |
A D | main.c | 46 ROUNDDOWN(GIC_BASE + GICD_OFFSET, CORE_MMU_PGDIR_SIZE), 54 GIC_BASE + GICD_OFFSET); in main_init_gic()
|
A D | platform_config.h | 61 #define GICD_OFFSET 0x1000 macro
|
/optee_os-3.20.0/core/arch/arm/plat-uniphier/ |
A D | main.c | 26 ROUNDDOWN(GIC_BASE + GICD_OFFSET, CORE_MMU_PGDIR_SIZE), 43 GIC_BASE + GICD_OFFSET); in main_init_gic()
|
A D | platform_config.h | 17 #define GICD_OFFSET 0 macro
|
/optee_os-3.20.0/core/arch/arm/plat-zynqmp/ |
A D | platform_config.h | 72 #define GICD_OFFSET 0 macro 87 #define GICD_OFFSET 0 macro
|
A D | main.c | 62 ROUNDDOWN(GIC_BASE + GICD_OFFSET, CORE_MMU_PGDIR_SIZE), 84 GIC_BASE + GICD_OFFSET); in main_init_gic()
|
/optee_os-3.20.0/core/arch/arm/plat-zynq7k/ |
A D | platform_config.h | 40 #define GICD_OFFSET 0x1000 macro 42 #define GIC_DIST_BASE (GIC_BASE + GICD_OFFSET)
|
/optee_os-3.20.0/core/arch/arm/plat-amlogic/ |
A D | platform_config.h | 16 #define GICD_OFFSET 0x1000 macro
|
/optee_os-3.20.0/core/arch/arm/plat-versal/ |
A D | main.c | 40 GIC_BASE + GICD_OFFSET, CORE_MMU_PGDIR_SIZE); 56 GIC_BASE + GICD_OFFSET); in main_init_gic()
|
A D | platform_config.h | 44 #define GICD_OFFSET 0 macro
|
/optee_os-3.20.0/core/arch/arm/plat-imx/registers/ |
A D | imx6.h | 87 #define GICD_OFFSET 0x1000 macro 102 #define GIC_DIST_BASE (GIC_BASE + GICD_OFFSET)
|
/optee_os-3.20.0/core/arch/arm/plat-aspeed/ |
A D | platform_config.h | 17 #define GICD_OFFSET 0x1000 macro
|
A D | platform_ast2600.c | 47 register_phys_mem(MEM_AREA_IO_SEC, GIC_BASE + GICD_OFFSET, GIC_DIST_REG_SIZE); 66 gic_init(&gic_data, GIC_BASE + GICC_OFFSET, GIC_BASE + GICD_OFFSET); in main_init_gic()
|
/optee_os-3.20.0/core/arch/arm/plat-synquacer/ |
A D | platform_config.h | 14 #define GICD_OFFSET 0x0 macro
|
/optee_os-3.20.0/core/arch/arm/plat-sunxi/ |
A D | platform_config.h | 48 #define GICD_OFFSET 0x1000 macro
|