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Searched refs:PLL3_Q (Results 1 – 9 of 9) sorted by relevance

/optee_os-3.20.0/core/include/dt-bindings/clock/
A Dstm32mp13-clks.h32 #define PLL3_Q 17 macro
A Dstm32mp1-clks.h196 #define PLL3_Q 187 macro
/optee_os-3.20.0/core/arch/arm/dts/
A Dstm32mp15xx-dhcom-pdk2.dtsi221 clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
A Dstm32mp15xx-dkx.dtsi432 clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
500 clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
A Dstm32mp15xx-dhcor-avenger96.dtsi290 clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
/optee_os-3.20.0/core/arch/arm/plat-stm32mp1/
A Dshared_resources.c460 (PLL1_P + 7) == PLL3_Q && in stm32mp_nsec_can_access_clock()
A Dscmi_server.c117 CLOCK_CELL(CK_SCMI_PLL3_Q, PLL3_Q, "pll3_q", true),
/optee_os-3.20.0/core/drivers/clk/
A Dclk-stm32mp15.c127 [_PLL3_Q] = PLL3_Q,
420 PLL1_P, PLL1_Q, PLL1_R, PLL2_P, PLL2_Q, PLL2_R, PLL3_P, PLL3_Q, PLL3_R,
1425 CLOCK_NAME(PLL3_Q, "pll3q"),
A Dclk-stm32mp13.c2403 [PLL3_Q] = &ck_pll3q,

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