Searched refs:PLL3_R (Results 1 – 9 of 9) sorted by relevance
| /optee_os-3.20.0/core/include/dt-bindings/clock/ |
| A D | stm32mp13-clks.h | 33 #define PLL3_R 18 macro
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| A D | stm32mp1-clks.h | 197 #define PLL3_R 188 macro
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| /optee_os-3.20.0/core/arch/arm/plat-stm32mp1/ |
| A D | shared_resources.c | 461 (PLL1_P + 8) == PLL3_R); in stm32mp_nsec_can_access_clock()
464 (clock_id >= PLL1_P && clock_id <= PLL3_R)) in stm32mp_nsec_can_access_clock()
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| A D | scmi_server.c | 118 CLOCK_CELL(CK_SCMI_PLL3_R, PLL3_R, "pll3_r", true),
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| /optee_os-3.20.0/core/arch/arm/dts/ |
| A D | stm32mp15xx-dhcom-pdk2.dtsi | 221 clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
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| A D | stm32mp15xx-dkx.dtsi | 432 clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
500 clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
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| A D | stm32mp15xx-dhcor-avenger96.dtsi | 290 clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
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| /optee_os-3.20.0/core/drivers/clk/ |
| A D | clk-stm32mp15.c | 128 [_PLL3_R] = PLL3_R,
420 PLL1_P, PLL1_Q, PLL1_R, PLL2_P, PLL2_Q, PLL2_R, PLL3_P, PLL3_Q, PLL3_R,
1426 CLOCK_NAME(PLL3_R, "pll3r"),
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| A D | clk-stm32mp13.c | 2404 [PLL3_R] = &ck_pll3r,
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