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Searched refs:SCR_NS (Results 1 – 3 of 3) sorted by relevance

/optee_os-3.20.0/core/arch/arm/plat-hisilicon/
A Dhi3519av100_plat_init.S51 orr r0, r0, #SCR_NS /* Set NS bit in SCR */
60 bic r0, r0, #SCR_NS /* Clr NS bit in SCR */
/optee_os-3.20.0/core/arch/arm/sm/
A Dsm_a32.S105 tst r1, #SCR_NS
159 orr r0, r0, #(SCR_NS | SCR_FIQ) /* Set NS and FIQ bit in SCR */
177 bic r1, r1, #(SCR_NS | SCR_FIQ) /* Clear NS and FIQ bit in SCR */
225 bic r1, r1, #(SCR_NS | SCR_FIQ) /* Clear NS and FIQ bit in SCR */
340 orr r0, r0, #SCR_NS /* Set NS bit in SCR */
364 bic r0, r0, #SCR_NS /* Clr NS bit in SCR */
/optee_os-3.20.0/core/arch/arm/include/
A Darm32.h37 #define SCR_NS BIT32(0) macro

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