Searched refs:SCU_BASE (Results 1 – 12 of 12) sorted by relevance
| /optee_os-3.20.0/core/arch/arm/plat-ti/ |
| A D | platform_config.h | 39 #define SCU_BASE 0x48210000 macro
44 #define GICC_BASE (SCU_BASE + GICC_OFFSET)
45 #define GICD_BASE (SCU_BASE + GICD_OFFSET)
73 #define SCU_BASE 0x48240000 macro
80 #define GICD_BASE (SCU_BASE + GICD_OFFSET)
81 #define GICC_BASE (SCU_BASE + GICC_OFFSET)
82 #define PL310_BASE (SCU_BASE + PL310_OFFSET)
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| /optee_os-3.20.0/core/arch/arm/plat-stm/ |
| A D | main.c | 122 io_write32(SCU_BASE + SCU_SAC, SCU_SAC_INIT); in plat_primary_init_early()
123 io_write32(SCU_BASE + SCU_NSAC, SCU_NSAC_INIT); in plat_primary_init_early()
124 io_write32(SCU_BASE + SCU_FILT_EA, CPU_PORT_FILT_END); in plat_primary_init_early()
125 io_write32(SCU_BASE + SCU_FILT_SA, CPU_PORT_FILT_START); in plat_primary_init_early()
126 io_write32(SCU_BASE + SCU_CTRL, SCU_CTRL_INIT); in plat_primary_init_early()
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| A D | platform_config.h | 48 #define SCU_BASE (CPU_IOMEM_BASE + 0x0000) macro
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| /optee_os-3.20.0/core/arch/arm/plat-k3/ |
| A D | platform_config.h | 24 #define SCU_BASE 0x01800000 macro
58 #define GICC_BASE (SCU_BASE + GICC_OFFSET)
59 #define GICD_BASE (SCU_BASE + GICD_OFFSET)
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| /optee_os-3.20.0/core/arch/arm/plat-zynq7k/ |
| A D | main.c | 67 io_write32(SCU_BASE + SCU_INV_SEC, SCU_INV_CTRL_INIT); in plat_primary_init_early()
68 io_write32(SCU_BASE + SCU_SAC, SCU_SAC_CTRL_INIT); in plat_primary_init_early()
69 io_write32(SCU_BASE + SCU_NSAC, SCU_NSAC_CTRL_INIT); in plat_primary_init_early()
72 io_setbits32(SCU_BASE + SCU_CTRL, 0x1); in plat_primary_init_early()
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| A D | platform_config.h | 36 #define SCU_BASE 0xF8F00000 macro
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| /optee_os-3.20.0/core/arch/arm/plat-aspeed/ |
| A D | platform_config.h | 20 #define SCU_BASE 0x1e6e2000 macro
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| A D | platform_ast2600.c | 50 register_phys_mem(MEM_AREA_IO_NSEC, SCU_BASE, SMALL_PAGE_SIZE);
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| /optee_os-3.20.0/core/arch/arm/plat-imx/drivers/ |
| A D | imx_scu.c | 15 vaddr_t scu_base = core_mmu_get_va(SCU_BASE, MEM_AREA_IO_SEC, in scu_init()
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| /optee_os-3.20.0/core/arch/arm/kernel/ |
| A D | tz_ssvce_pl310_a32.S | 153 #ifdef SCU_BASE
163 sub r0, r0, #(PL310_BASE - SCU_BASE)
167 add r0, r0, #(PL310_BASE - SCU_BASE)
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| /optee_os-3.20.0/core/drivers/crypto/aspeed/ |
| A D | crypto_ast2600.c | 28 scu_virt = core_mmu_get_va(SCU_BASE, MEM_AREA_IO_NSEC, SMALL_PAGE_SIZE); in crypto_ast2600_init()
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| /optee_os-3.20.0/core/arch/arm/plat-imx/registers/ |
| A D | imx6.h | 78 #define SCU_BASE 0x00A00000 macro
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