Searched refs:TZDRAM_BASE (Results 1 – 12 of 12) sorted by relevance
/optee_os-3.20.0/core/arch/arm/include/mm/ |
A D | generic_ram_layout.h | 143 #define TZDRAM_BASE CFG_TZDRAM_START macro 148 #define TZDRAM_BASE ROUNDUP(TZSRAM_BASE + TZSRAM_SIZE, \ macro 151 TZDRAM_BASE)) 157 #define TA_RAM_START ROUNDUP(TZDRAM_BASE, CORE_MMU_PGDIR_SIZE) 159 #define TEE_RAM_START TZDRAM_BASE 161 #define TA_RAM_START ROUNDUP(TZDRAM_BASE + TEE_RAM_VA_SIZE, \ 165 #define TA_RAM_SIZE (ROUNDDOWN(TZDRAM_BASE + (TZDRAM_SIZE - \
|
A D | core_mmu_arch.h | 35 #ifdef TZDRAM_BASE 39 #define TRUSTED_DRAM_BASE TZDRAM_BASE
|
/optee_os-3.20.0/core/arch/arm/plat-zynq7k/ |
A D | platform_config.h | 197 #define TZDRAM_BASE 0x3e100000 macro 203 #define TA_RAM_START TZDRAM_BASE 231 #define TZDRAM_BASE 0x3E000000 macro 234 #define TEE_RAM_START TZDRAM_BASE 237 #define TA_RAM_START (TZDRAM_BASE + TEE_RAM_PH_SIZE) 240 #define TEE_SHMEM_START (TZDRAM_BASE + TZDRAM_SIZE)
|
/optee_os-3.20.0/core/arch/arm/plat-poplar/ |
A D | platform_config.h | 119 #define TZDRAM_BASE 0x03200000 macro 124 #define TA_RAM_START ROUNDUP(TZDRAM_BASE, CORE_MMU_PGDIR_SIZE) 129 #define TZDRAM_BASE 0x03000000 macro 132 #define TEE_RAM_START TZDRAM_BASE 134 #define TA_RAM_START ROUNDUP((TZDRAM_BASE + TEE_RAM_VA_SIZE), \
|
/optee_os-3.20.0/core/arch/arm/plat-sprd/ |
A D | platform_config.h | 54 #define TZDRAM_BASE 0x8f600000 macro 57 #define TEE_SHMEM_START (TZDRAM_BASE + TZDRAM_SIZE) 82 #define TEE_RAM_START TZDRAM_BASE 83 #define TA_RAM_START ROUNDUP((TZDRAM_BASE + TEE_RAM_VA_SIZE), \
|
/optee_os-3.20.0/core/arch/arm/plat-ti/ |
A D | platform_config.h | 15 #define TZDRAM_BASE 0xbdb00000 macro 59 #define TZDRAM_BASE 0xbdb00000 macro 129 #define TEE_RAM_START TZDRAM_BASE 134 #define TA_RAM_START ROUNDUP((TZDRAM_BASE + TEE_RAM_VA_SIZE), \ 141 #define TEE_SHMEM_START (TZDRAM_BASE + TZDRAM_SIZE)
|
A D | main.c | 32 register_phys_mem(MEM_AREA_RAM_SEC, TZDRAM_BASE, TEE_RAM_VA_SIZE);
|
/optee_os-3.20.0/core/arch/arm/plat-stm/ |
A D | platform_config.h | 189 #define STM_SECDDR_BASE MIN_UNSAFE(TZSRAM_BASE, TZDRAM_BASE) 191 TZDRAM_BASE + TZDRAM_SIZE) 196 #define STM_SECDDR_BASE TZDRAM_BASE 197 #define STM_SECDDR_END (TZDRAM_BASE + TZDRAM_SIZE)
|
/optee_os-3.20.0/core/arch/arm/plat-rzg/ |
A D | platform_config.h | 50 #define TEE_SHMEM_START (TZDRAM_BASE + TZDRAM_SIZE)
|
/optee_os-3.20.0/core/arch/arm/plat-rcar/ |
A D | platform_config.h | 109 #define TEE_SHMEM_START (TZDRAM_BASE + TZDRAM_SIZE)
|
/optee_os-3.20.0/core/arch/arm/plat-marvell/armada3700/ |
A D | hal_sec_perf.c | 62 #define RA_ADDR TZDRAM_BASE
|
/optee_os-3.20.0/core/arch/arm/plat-marvell/armada7k8k/ |
A D | hal_sec_perf.c | 61 #define RA_ADDR TZDRAM_BASE
|
Completed in 10 milliseconds