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Searched refs:UART0_BASE (Results 1 – 18 of 18) sorted by relevance

/optee_os-3.20.0/core/arch/arm/plat-mediatek/
A Dplatform_config.h26 #define UART0_BASE 0x11002000 macro
31 #define CONSOLE_UART_BASE UART0_BASE
44 #define UART0_BASE 0x11002000 macro
48 #define CONSOLE_UART_BASE UART0_BASE
58 #define UART0_BASE 0x11005000 macro
62 #define CONSOLE_UART_BASE UART0_BASE
72 #define UART0_BASE 0x11002000 macro
76 #define CONSOLE_UART_BASE UART0_BASE
86 #define UART0_BASE 0x11001100 macro
90 #define CONSOLE_UART_BASE UART0_BASE
/optee_os-3.20.0/core/arch/arm/plat-ls/
A Dplatform_config.h38 #define CONSOLE_UART_BASE UART0_BASE
43 #define UART0_BASE 0x021C0500 macro
52 #define UART0_BASE 0x021C0500 macro
66 #define UART0_BASE 0x021C0500 macro
76 #define UART0_BASE 0x021C0500 macro
86 #define UART0_BASE 0x021C0600 macro
96 #define UART0_BASE 0x021C0500 macro
106 #define UART0_BASE 0x021C0000 macro
116 #define UART0_BASE 0x021C0000 macro
/optee_os-3.20.0/core/arch/arm/plat-vexpress/
A Dplatform_config.h18 #define UART0_BASE 0x1c090000 macro
34 #define UART0_BASE 0x1c090000 macro
58 #define UART0_BASE 0x09000000 macro
71 #define UART0_BASE 0x09000000 macro
/optee_os-3.20.0/core/arch/arm/plat-synquacer/
A Dplatform_config.h17 #define UART0_BASE 0x2A400000 macro
18 #define CONSOLE_UART_BASE UART0_BASE
/optee_os-3.20.0/core/arch/arm/plat-totalcompute/
A Dplatform_config.h23 #define UART0_BASE 0x7FF70000 macro
26 #define CONSOLE_UART_BASE UART0_BASE
/optee_os-3.20.0/core/arch/riscv/plat-virt/
A Dmain.c18 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, UART0_BASE,
36 ns16550_init(&console_data, UART0_BASE, IO_WIDTH_U8, 0); in console_init()
A Dplatform_config.h35 #ifndef UART0_BASE
36 #define UART0_BASE 0x10000000 macro
/optee_os-3.20.0/core/arch/arm/plat-versal/
A Dplatform_config.h21 #define UART0_BASE 0xFF000000 macro
29 #define CONSOLE_UART_BASE UART0_BASE
/optee_os-3.20.0/core/arch/arm/plat-zynqmp/
A Dplatform_config.h63 #define UART0_BASE 0xFF000000 macro
78 #define UART0_BASE 0xFF000000 macro
A Dconf.mk26 CFG_UART_BASE ?= UART0_BASE
/optee_os-3.20.0/core/arch/arm/plat-k3/
A Dplatform_config.h12 #define UART0_BASE 0x02800000 macro
14 #define CONSOLE_UART_BASE (UART0_BASE + CFG_CONSOLE_UART * 0x10000)
/optee_os-3.20.0/core/arch/arm/plat-ti/
A Dplatform_config.h62 #define UART0_BASE 0x44E09000 macro
69 #define CONSOLE_UART_BASE UART0_BASE
/optee_os-3.20.0/core/arch/arm/plat-imx/registers/
A Dimx8q.h11 #define UART0_BASE 0x5a060000 macro
/optee_os-3.20.0/core/arch/arm/plat-corstone1000/
A Dplatform_config.h16 #define UART0_BASE 0x1a510000 macro
/optee_os-3.20.0/core/arch/arm/plat-sprd/
A Dplatform_config.h44 #define UART0_BASE 0x70000000 macro
/optee_os-3.20.0/core/arch/arm/plat-zynq7k/
A Dplatform_config.h64 #define UART0_BASE 0xE0000000 macro
/optee_os-3.20.0/core/arch/arm/plat-rockchip/
A Dplatform_config.h54 #define UART0_BASE (MMIO_BASE + 0x07180000) macro
/optee_os-3.20.0/core/arch/arm/plat-imx/
A Dconf.mk393 CFG_UART_BASE ?= UART0_BASE
401 CFG_UART_BASE ?= UART0_BASE

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